Keywords: ERROR:Bitgen:157, external, cclk, even number, Enable External Master Clock, Setup External Master Clock Division, -g ExtMasterCclk_en, -g ExtMasterCclk_divide, 11.3
1 is a valid value for ExtMasterCclk_divide.
In BitGen 11.2, when I check the Enable External Master Clock option, and leave Setup External Master Clock Division as its default value of 1, the following errors occur:
ERROR:Bitgen:302 - Illegal value 1 for ExtMasterCclk_divide. It must be either 1 or an even number between 2 and 1022.
ERROR:Bitgen:157 - Bitgen will terminate because of the above errors.