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11.2 BitGen - "ERROR:Bitgen:302 - Illegal value 1 for ExtMasterCclk_divide"

AR# 33191

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Topic SW-Bitgen
Last Updated 07/23/2009
Status Active
Description

Keywords: ERROR:Bitgen:157, external, cclk, even number, Enable External Master Clock, Setup External Master Clock Division, -g ExtMasterCclk_en, -g ExtMasterCclk_divide, 11.3

1 is a valid value for ExtMasterCclk_divide.
In BitGen 11.2, when I check the Enable External Master Clock option, and leave Setup External Master Clock Division as its default value of 1, the following errors occur:

ERROR:Bitgen:302 - Illegal value 1 for ExtMasterCclk_divide. It must be either 1 or an even number between 2 and 1022.
ERROR:Bitgen:157 - Bitgen will terminate because of the above errors.

Solution

This issue will be resolved in BitGen 11.3.


 
 
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