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Serial RapidIO v5.3 - Virtex-6 FPGA 1.25 Gbs simulations fail because the MMCM_ADV Unisim Model does not handle fractional values correctly

AR# 33193

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Topic IP-RapidIO-Serial
Last Updated 09/09/2009
Status Active
Description

Keywords: fractions

Known Issue: v5.3

Virtex-6 FPGA 1.25 Gbps simulations fail because of problems with the MMCM_ADV Unisim model. The model is not correctly handling fractional multiple and divide values.

Solution

Work around this problem by changing the following parameters on the 1.25 Gbps MMCM_ADV instantiation to the values shown here:

.CLKFBOUT_MULT_F (6.5),
.CLKOUT0_DIVIDE_F (13),
.CLKOUT1_DIVIDE (52),


Revision History
07/23/2009 - Initial Release
09/09/2009 - Added affected core version
 
 
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