11.2 Virtex-4 MAP - Shift Register logic corrupted by Global Optimization algorithm
Description
My design does not work in hardware and I have traced the problem area to a shift register. The problem is also dependent on the use of the -global_opt option of MAP. Is this a known problem?
Solution
There is a known problem that shift register logic can be occasionally corrupted by the Global Optimization algorithm.
This problem has been fixed for ISE revision 11.3.
Applies To
Design Tools
- ISE Design Suite - 10.1 sp2
- ISE Design Suite - 10.1 sp3
- ISE Design Suite - 11.1
- ISE Design Suite - 11.2