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AR# 33225 SP601 - Known Issues / Release Notes Master Answer Record

Description

This answer record listsall known issues with the SP601 Rev C Spartan-6 FPGA Evaluation Kit.

Solution

Board/Kit Related Issues
(Xilinx Answer 33229) SP601 - Problems running Base Reference Design on Windows Vista
(Xilinx Answer 33319) SP601 - HyperTerminal does not automatically detect USB UART Bridge
(Xilinx Answer 33569) Development Boards - Where can I find the USB UART driver?
(Xilinx Answer 37579) What device do I have on my board? Is it an Engineering Sample or Production silicon?
(Xilinx Answer 39210) Boards - Directory structure of CF card changed
(Xilinx Answer 40350) Development Boards - Do 6Series Evaluation Kits from Xilinx support eFuse?
(Xilinx Answer 40705) Development Boards - BRD GUI on Windows 7
(Xilinx Answer 52472) - 14.x - 6 Series Boards and Kits - Are TRDs and Example Designs available for 14.x?

Documentation Related Issues
(Xilinx Answer 33220) SP601 Rev C - Schematic shows reference to sa16cs324. What is this block?
(Xilinx Answer 33221) SP601 - Schematics point to XC6SLX16 I/O net names that differ from Packaging and Pinout Specifications and package files
(Xilinx Answer 43918) Spartan-6 FPGA SP601 Evaluation Kit - Is the Spartan-6 on the board in a CS324 or CSG324 package?

11.5 Software Information
Software version 11.5 includes important updates and supports production devices for the Virtex-6 and Spartan-6 device families. However, several work-arounds might be required for Virtex-6 and some Spartan-6 FPGA customers using ISE 11.5 software. Please review (Xilinx Answer 32147) before you upgrade to ISE 11.5 software. These work-arounds are addressed in ISE 12.1 software, released in May 2010.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
43750 Xilinx Boards and Kits Solution Center - Top Issues N/A N/A

Child Answer Records

Answer Number Answer Title Version Found Version Resolved
43918 Spartan-6 FPGA SP601 Evaluation Kit - Is the Spartan-6 on the board in a CS324 or CSG324 package? N/A N/A
35453 12.1 SP601 - NET "fpga_0_Ethernet_MAC_PHY_tx_clk_pin" CLOCK_DEDICATED_ROUTE = FALSE; N/A N/A
40705 Development Boards - BRD GUI on Windows 7 N/A N/A
39210 Boards - Directory structure of CF card changed N/A N/A

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
37579 Which device do I have on my Xilinx Evaluation Kit? Is it an Engineering Sample (ES) or Production silicon? N/A N/A

Actions

AR# 33225
Date Created 07/30/2009
Last Updated 10/31/2012
Status Active
Type Known Issues
Boards & Kits
  • Spartan-6 FPGA SP601 Evaluation Kit
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