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AR# 33279

LogiCORE IP Initiator, Target v4.10 for PCI - Release Notes and Known Issues for ISE Design Suite 11.3


This Release Notes and Known Issues Answer Record is for the LogiCORE IP Initiator, Target v4.10 for PCI , released in ISE Design Suite 11.3, and contains the following information:

  • General Information
  • New Features
  • Bug Fixes
  • Known Issues

For installation instructions, general CORE Generator interface known issues, and design tools requirements, see the IP Release Notes Guide at:


General Information
The LogiCORE IP Initiator Target for PCI v4.10 supports Virtex-5 and Spartan-6 architectures only. For all other devices, use the v3.167 PCI Core. For more information on this core, refer to (Xilinx Answer 32324).

New Features

  • ISE Design Suite 11.3 support
  • Additional Spartan-6 device support

Resolved Issues

  • Changes made to UCF files to resolve timing closure issues with certain device/package combinations.

Known Issues

  • Spartan-6 FPGA solutions are pending hardware validation.
  • The v4.10 core will not properly operate as an initiator, including issuing self configuration cycles. This is due to incorrect connections on the PCILOGIC macro. This has been fixed in v4.11 and later versions of the core.All designs targeting Spartan-6 FPGA must use v4.11 or later version of the core, along with ISE Design Suite 11.4 or later. A v4.10 or v4.9 will not function in hardware regardless of the ISE software version.
  • (Xilinx Answer 33564) LogiCORE Initiator, Target v4.10 for PCI - "WARNING:MapLib:708 - BYPASS attribute"

Revision History
04/07/2010 - Added note about PCILOGIC macro connections.
10/22/2009 - Added AR 33564 to Known Issues
09/16/2009 - Initial Release

AR# 33279
Date 05/19/2012
Status Archive
Type Release Notes
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