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AR# 33281

Virtex-6 FPGA - Speed Files Revision History

Description

This answer record contains the Revision History for Virtex-6 family speeds files.

Solution

Speeds Files Revision History

1.17 Release: Description and Explanation of Changes - 13.4/14.x

  • IOB - Updated parameters
  • IODELAY- Updated parameters

CXT Devices (1.11)

  • IODELAY- Updated parameters

LP Devices (1.11)

  • IODELAY - Updated parameters

1.15 Release: Description and Explanation of Changes - 13.3

  • No change

CXT Devices (1.10)

  • No Change

LP Devices (1.10)

  • Block RAM - Updated parameters

1.15 Release: Description and Explanation of Changes - 13.2

  • Block RAM - Updated parameters
  • Clocking and MMCM - Updated parameters

CXT Devices (1.10)

  • Block RAM - Updated parameters

LP Devices (1.09)

  • Block RAM - Updated parameters
  • IODELAY - Updated parameters
  • Clocking - Updated parameters

1.14 Release: Description and Explanation of Changes - 13.1 Update (O.40e)

  • Device HX565T and HX255T for all speed grades are labeled as PRODUCTION
  • Clocking - Updated parameters
  • MMCM - Updated parameters
  • GTHE - Updated parameters
  • Pin2Pin Tuning for Production devices

CXT Devices (1.09)

  • No change

LP Devices (1.08)

  • No change

1.13 Release: Description and Explanation of Changes - 13.1

  • Device HX250t for all speed grades are labeled as PRODUCTION
  • Clocking - Updated parameters for LX760

CXT Devices (1.09)

  • Devices CX75T, CX240T, and CX195T for all speed grades are labeled as PRODUCTION

LP Devices (1.08)

  • No change

1.11 Release: Description and Explanation of Changes - 12.4 Update

  • No change

CXT Devices (1.09)

  • No change

LP Devices (1.08)

  • No change

1.11 Release: Description and Explanation of Changes - 12.4

  • Devices HX255t, HX380t, and HX565t for speed grades -1and -2 are labeled as PRELIMINARY
  • Clocking - Updated parameters
  • IOB - Updated parameters
  • PCIE - Updated parameters
  • XQ devices - Updated parameters for CLB, DSP, IO, MMCM, PCIE, and SERDES components

CXT Devices (1.09)

  • Devices CX75t,CX240t,and CX195t for speed grades -1and -2 are labeled as PRODUCTION
  • MMCM - Updated parameters
  • DSP - Updated parameters
  • STARTUP - Updated parameters

LP Devices (1.08)

  • Devices SX315TL, SX475TL, SX365TL, SX550TL, and SX760TL for all speed grades are labeled as PRODUCTION
  • Clocking - Updated parameters
  • ICAP - Updated parameters
  • MMCM - Updated parameters
  • DSP - Updated parameters

1.09 Release: Description and Explanation of Changes - 12.3

  • Tioddo delay is returned to the original PRODUCTION value for LX240t devices for all speed grades
  • STARTUP - Updated parameters
  • Devices LX130t, LX195t, and LX365t for speed grade -3 are labeled as PRODUCTION
  • Devices LX550t, LX760, SX315t, and SX475t for speed grades -1 and -2 are labeled as PRODUCTION

CXT Devices (1.06)

  • Device CX130t for speed grades -1and -2 are labeled as PRODUCTION
  • Device CX75t for speed grades -1and -2 are labeled as PRELIMINARY

LP Devices (1.06)

  • Devices LX75t, SX315t, SX465t, and LX760 for speed grades -1L is PRELIMINARY
  • Devices LX130t for speed grades -1L is PRODUCTION

1.08 Release: Description and Explanation of Changes - 12.2 Patch

  • IODELAY - Updated parameters
  • BUFIO - Updated parameters
  • Devices SX315T, LX75t, HX250t,and LX365t for all speed grades are labeled as PRELIMINARY
  • Devices SX475t and LX760 for speed grades -1 and -2 are labeled as PRELIMINARY

CXT Devices (1.05)

  • No change

LP Devices (1.05)

  • Devices LX130t, LX365t, LX550tl,and LS240t for speed grades -1L is PRELIMINARY

1.07 Release: Description and Explanation of Changes - 12.2

  • Clocking - Updated parameters
  • IODELAY - Updated parameters
  • MMCM - Updated parameters
  • Devices LX195t for speed grades -1 and -2 are labeled as PRODUCTION, and speed grade -3 are labeled as PRELIMINARY
  • Devices LX550t for speed grades -1 and -2 is PRELIMINARY

CXT Devices (1.05)

  • Device CX195t for speed grades -1and -2 are labeled as PRELIMINARY
  • MMCM - Updated parameters
  • IOB - Updated parameters

LP Devices (1.04)

  • Devices LX195t for speed grades -1L is labeled as PRELIMINARY
  • MMCM - Updated parameters
  • DSP - Updated parameters
  • Clocking- Updated parameters
  • IOB- Updated parameters
  • CLB- Updated parameters
  • IODELAY- Updated parameters
  • PCIe- Updated parameters
  • RAMB- Updated parameters
  • SERDES- Updated parameters
  • TEMAC - Updated parameters

1.06 Release: Description and Explanation of Changes - 12.1

  • IOI - Updated parameters
  • Devices LX240t and LX130t for speed grades -1 and -2 are labeled as PRODUCTION, and speed grade -3 is labeled as PRELIMINARY

CXT Devices (1.04)

  • No change

LP Devices

  • No change

1.05 Release: Description and Explanation of Changes - 11.5

General Devices (LX/ LXT, SXT, and HXT devices)

  • PCIe - Updated parameters for Clock Skew Checks
  • CLB - Updated Component Switching Limit Checks
  • ICAP - Updated Component Switching Limit Checks
  • IODELAY - Updated Component Switching Limit Checks

CXT Devices (1.04)

  • IODELAY - Updated Component Switching Limit Checks
  • SERDES - Updated parameters
  • IOI - Updated parameters

LP Devices

  • GTP - Updated parameters
  • Added XQ devices

1.04 Release: Description and Explanation of Changes

General Devices (LX/ LXT, SXT, and HXT devices)

  • DSP - Updated parameters

1.03 Release: Description and Explanation of Changes ( 11.4.1)

General Devices (LX/ LXT, SXT, and HXT devices)

  • MMCM - Updated VCO frequencies and Component Switching Limit Checks
  • IOI - Updated parameters
  • RAMBFIFO36 - Updated parameters
  • SERDES - Updated parameters

1.02 Release: Description and Explanation of Changes - 11.4

General Devices (LX/ LXT, SXT, and HXT devices)

  • Added HST -3 speed grade
  • Added default System Jitter values
  • PCIE - Updated parameters
  • GTHE - Updates to MINPERIOD/FMAX parameters
  • IOB - Updates on the Datain2Dataout path - Moved a delay from IOB to IODELAY+ DSP - updated parameters
  • MMCM - Updated interconnects and cascaded components
  • IODELAY - Moved a delay from IOB to IODELAY
  • IOI and SERDES - Updated parameters
  • CLB - Updated setups on LUT RAM and slow down LUT delays
  • System Monitor - updated parameters

CXT Devices (1.03)

  • Added default System Jitter values
  • IOB - Updates on the Datain2Dataout path - Moved a delay from IOB to IODELAY
  • DSP - Updated parameters
  • MMCM - Updated interconnects and cascaded components
  • IODELAY - Moved a delay from IOB to IODELAY
  • IOI and SERDES - Updated parameters
  • CLB - Updated setups on LUT RAM and slow down LUT delays
  • System Monitor - Updated parameters

LP Devices

  • Added default System Jitter values
  • IOB - Updates on the Datain2Dataout path - Moved a delay from IOB to IODELAY
  • DSP - Updated parameters
  • MMCM - Updated interconnects and cascaded components
  • IODELAY - Moved a delay from IOB to IODELAY
  • IOI and SERDES - Updated parameters
  • CLB - Updated setups on LUT RAM and slow down LUT delays
  • System Monitor - Updated parameters

1.01 Release: Description and Explanation of Changes - 11.3

General Devices (LX / LXT and SXT devices)

  • Clocking - Updated BUFIO interconnect delays - Updated clocking values for HXT devices from confidence level 6 to 6.9
  • RAMB / FIFO - Updated minperiod checks depending if the site is configured as read_first, write_first or no_change
  • IODELAY - Increased ODATAIN -> DATAOUT between 172 ps and 269 ps depending on speed grade. - Updated uncertainty values for the first 6 tap values. Fastmax=Slowmax
  • OLOGIC -Changed Fmax on D_OLOGICE1_OUTFF_CK_MINPERIOD from 924 MHz to (665 MHz - 739 MHz) depending on speed grade.
  • DSP48E1 - Added new parameters for CEA1 and CEB1 setup and hold checks to AREG_2 and BREG_2 respectively
  • IOI - Added new speed models for _{L,R}IOI_DATAOUT2D (requires a device modeling update)
  • GTHE1_QUAD - Just about delay values (setup / hold and clk -> out) value changed. - Confidence level moved from 1.0 to 6.9 on all values except for REFCLK to TSTREFCLKOUT/FAB
  • TEMAC_SINGLE - CLK to EMACCLIENTTXACK/COLLISION/RETRANSMIT values decreased at the slow and fast corners for all speed grades. - Added timing arc parameters.
  • GTXE - Setup requirements to TXUSRCLK2 and RXUSRCLK2 decreased for -2 and -1 speed grades. Hold requirements did not change. - IOPath delays from TXUSERCLK2, RXUSRCLK2 and SCANCLK decreased at the slow corner. - DCLK to DRDY and DRPDO decreased at the slow corner for all speed grades. - MinPeriod values on DCLK increased at the slow corner for all speed grades. - NORTHREFCLKRX and MGTREFCLKRX to MGTREFCLKFAB moved from confidence level 9.0 to 1.0.
  • PCIe_2 - MinPeriod checks were added for USERCLK, PIPECLK, and DRPCLK. They were already in the speed file, but they are now added to the delaymodels.
  • MMCM - Lowered values for MMCM_CLKPFD_FREQ_MAX

CXT Devices (1.02)

  • Clocking - Updated BUFIO interconnect delays
  • DSP48E1- Changed due to CXT Marketing SPEEDLIMITS for various fast modes - Added new parameters for CEA1 and CEB1 setup and hold checks to AREG_2 and BREG_2 respectively
  • RAMB / FIFO - Changed due to CXT Marketing SPEEDLIMITS for various fast modes - Updated minperiod checks depending if the site is configured as read_first, write_first, or no_change
  • IODELAY - Updated uncertainty values for the first 6 tap values. Fastmax=Slowmax
  • OLOGIC - Changed Fmax on D_OLOGICE1_OUTFF_CK_MINPERIOD from 924 MHz to (665 MHz - 739 MHz) depending on speed grade.
  • IOI - Added new speed models for _{L,R}IOI_DATAOUT2D (requires a device modeling update)
  • GTHE1_QUAD - Just about delay values (setup / hold and clk -> out) value changed. - Confidence level moved from 1.0 to 6.9 on all values except for REFCLK to TSTREFCLKOUT/FAB
  • TEMAC_SINGLE - CLK to EMACCLIENTTXACK/COLLISION/RETRANSMIT values decreased at the slow and fast corners for all speed grades. - Added need timing arc parameters
  • GTXE - Setup requirements to TXUSRCLK2 and RXUSRCLK2 decreased for -2 and -1 speed grades. Hold requirements did not change. - IOPath delays from TXUSERCLK2, RXUSRCLK2 and SCANCLK decreased at the slow corner. - DCLK to DRDY and DRPDO decreased at the slow corner for all speed grades. - MinPeriod values on DCLK increased at the slow corner for all speed grades. - NORTHREFCLKRX and MGTREFCLKRX to MGTREFCLKFAB moved from confidence level 9.0 to 1.0.
  • PCIe_2 - MinPeriod checks were added for USERCLK, PIPECLK, and DRPCLK. They were already in the speed file, but they are now added to the delaymodels.
  • MMCM - Lowered values for MMCM_CLKPFD_FREQ_MAX

LP Devices

  • Clocking -Updated BUFIO interconnect delays
  • RAMB / FIFO - Updated minperiod checks depending if the site is configured as read_first, write_first or no_change. Added need timing arc parameters.
  • IODELAY - Updated uncertainty values for the first 6 tap values. Fastmax=Slowmax. Updated a LEAKAGE adjustment. This reduces uncertainty per tap value on all designs.
  • CLB - corrected values for D_SL_DFF_DQ (now they are 0.000)
  • DSP48E1 - Added new parameters for CEA1 and CEB1 setup and hold checks to AREG_2 and BREG_2 respectively
  • IOI - Added new speed models for _{L,R}IOI_DATAOUT2D (requires a device modeling update)
  • TEMAC - Updated several parameters to change slowmin and slowmax delays.
  • GTHE1_QUAD - Just about delay values (setup / hold and clk -> out) value changed. Confidence level moved from 1.0 to 6.9 on all values except for REFCLK to TSTREFCLKOUT/FAB
  • TEMAC_SINGLE - CLK to EMACCLIENTTXACK/COLLISION/RETRANSMIT values decreased at the slow and fast corners for all speed grades. Added need timing arc parameters.
  • GTXE - Setup requirements to TXUSRCLK2 and RXUSRCLK2 decreased for -2 and -1 speed grades. Hold requirements did not change. IOPath delays from TXUSERCLK2, RXUSRCLK2 and SCANCLK decreased at the slow corner. DCLK to DRDY and DRPDO decreased at the slow corner for all speed grades. MinPeriod values on DCLK increased at the slow corner for all speed grades. NORTHREFCLKRX and MGTREFCLKRX to MGTREFCLKFAB moved from confidence level 9.0 to 1.0.
  • PCIe_2 - MinPeriod checks were added for USERCLK, PIPECLK, and DRPCLK. They were already in the speed file, but they are now added to the delaymodels.
  • MMCM - Lowered values for MMCM_CLKPFD_FREQ_MAX
AR# 33281
Date Created 08/14/2009
Last Updated 02/05/2013
Status Active
Type Release Notes
Devices
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • More
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Less