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AR# 33299

Distributed Memory Generator v4.2 - Release Notes and Known Issues for ISE 11.3


This Release Notes and Known Issues Answer Record is for the Distributed Memory Generator v4.2 Core, released in ISE 11.3, and contains the following information: 


- General Information 

- New Features 

- Bug Fixes 

- Known Issues 


For installation instructions, general CORE Generator known issues, and design tools requirements, see the IP Release Notes Guide at:  



b>General Information 


The Xilinx Distributed Memory Generator v4.2 LogiCORE should be used in all new designs for supported families wherever a distributed memory is required. This core supersedes all versions of the previously released Distributed Memory LogiCORE.  


New Features in v4.2 


- ISE 11.3 software support 


- Virtex-6 Lower Power and Virtex-6 HXT device support 

- Spartan-3A/-3A DSP Automotive device support 



Bugs Fixed in v4.2 


- Default Data option is unavailable in the core GUI for Spartan-6 devices. 

- Version fixed: 4.2 

- CR 522888 

- AR 32753 


- In Distributed Memory Generator VHDL behavioral model, DOUT is undefined initially until a read occurs 

- Version fixed: 4.2 

- CR 523629 

- AR 32816 



Known Issues in v4.2 


(Xilinx Answer 21393) - When a large Distributed Memory Generator IP is generated, CORE Generator runs out of memory and fails to generate - CR 431917 



Revision History 

09/16/2009 - Initial Release

AR# 33299
Date Created 09/08/2009
Last Updated 05/23/2014
Status Archive
Type General Article