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AR# 33300

12.1 EDK, MPMC v6.00.a - SDMA hangs when using narrow external memory widths


When using the SDMA port of the MPMC with the below external memory configurations, I find that the SDMA is unable to complete transactions correctly. This frequently occurs under long packet sizes or high memory throughput demand.

How do I resolve this issue?

11.1 MPMC v5.00.a and later:

DDR/DDR2: 8-bit

SDR SDRAM: 8-, 16-bit

10.1sp3 MPMC v4.03.a and earlier:

DDR/DDR2: 8-, 16-bit

SDR SDRAM: 8-, 16-, and 32-bit

Spartan-6 FPGA hard controller


Virtex-6 FPGA

Unaffected, though DRCs will not allow 8-bit wide DDR2/DDR3 until 13.1


This issue occurs because of a limitation in the handling of memory throttling of the SDMA. This occurs when the internal NPI datapath of the SDMA is wider than the effective SDR width of the external memory.

Improvements in this issue occurred in MPMC v5.00.a with SDMA v2.00.a.

Spartan-6 FPGA is not affected by this issue in any memory width.

Starting in EDK 11.4 with MPMC v5.04.a, the MPMC data sheet will document this limitation in the SDMA PIM section, and EDK XPS will not allow unsupported configurations to be built. Support for additional widths is not currently planned.

The MPMC v5.04.a data sheet will read:

SDMA supports the following configurations only:

- 16-, 32-, and 64-bit for DDR

- 32- and 64-bit for SDRAM

- All widths in Spartan-6

Starting with EDK 13.1, Virtex-6 FPGA will allow 8-bit wide interfaces.
AR# 33300
Date Created 10/16/2009
Last Updated 08/16/2010
Status Active
Type General Article
  • EDK - 10.1 sp2
  • EDK - 10.1
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  • Multi-Port Memory Controller (MPMC)