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AR# 33304 LogiCORE IP 10-Gigabit Ethernet MAC v9.3 and v9.3 rev1 - Release Notes and Known Issues for ISE 11.3 and ISE 11.5

Description

This Answer Record contains the Release Notes for the LogiCORE IP 10-Gigabit Ethernet MAC v9.3 core, which was released in ISE design tools11.3, and the v9.3 rev1 core, which was released in ISE design tools 11.5.This Answer Recordcontains the following information:

  • New Features
  • Bug Fixes
  • Known Issues

For installation instructions, general CORE Generator software known issues, and design tools requirements, see the IP Release Notes Guide at: http://www.xilinx.com/support/documentation/ip_documentation/xtp025.pdf

Solution

New Features in v9.3

  • 11.3 ISE software support
  • Virtex-6 HXT device support
  • Virtex-6 Lower Power device support

Resolved Issues in v9.3

  • None

Resolved Issues in v9.3 rev1

  • (Xilinx Answer 34161) - LogiCORE IP 10-Gigabit Ethernet MAC v9.3 - The Virtex-6 FPGA Example Design MMCM instances can cause DRC errors
  • (Xilinx Answer 34783)-LogiCORE IP 10-Gigabit Ethernet MAC v9.3 - Virtex-6 Block RAM parameterization might result in memory collisions during simulation and erroneous operation

Known Issues in v9.3 rev1

  • Virtex-6 FPGA solutions are pending hardware validation.
  • (Xilinx Answer 35261)-LogiCORE IP 10-Gigabit Ethernet MAC v9.3 and earlier - VLAN frame misclassified after pause frame

Linked Answer Records

Child Answer Records

Answer Number Answer Title Version Found Version Resolved
35261 LogiCORE IP 10-Gigabit Ethernet MAC v9.3 and earlier - VLAN frame misclassified after pause frame N/A N/A
34783 LogiCORE IP 10-Gigabit Ethernet MAC v9.3 - Virtex-6 FPGA block RAM parameterization might result in memory collisions during simulation and erroneous operation N/A N/A
34161 LogiCORE IP 10-Gigabit Ethernet MAC v9.3 - The Virtex-6 Example Design MMCM instances can cause DRC errors N/A N/A

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
34783 LogiCORE IP 10-Gigabit Ethernet MAC v9.3 - Virtex-6 FPGA block RAM parameterization might result in memory collisions during simulation and erroneous operation N/A N/A
34161 LogiCORE IP 10-Gigabit Ethernet MAC v9.3 - The Virtex-6 Example Design MMCM instances can cause DRC errors N/A N/A

Actions

AR# 33304
Date Created 09/09/2009
Last Updated 05/22/2012
Status Active
Type Release Notes
Devices
  • Virtex-4 FX
  • Virtex-4 LX
  • Virtex-4 QPro/R
  • More
  • Virtex-4 SX
  • Virtex-5 FXT
  • Virtex-5 LX
  • Virtex-5 LXT
  • Virtex-5 SXT
  • Virtex-5 TXT
  • Virtex-5Q
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Less
Tools
  • ISE Design Suite - 11.3
  • ISE Design Suite - 11.4
  • ISE Design Suite - 11.5
IP
  • 10 Gigabit Ethernet Media Access Controller
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