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AR# 33329

11.2 EDK, MPMCv5.02.a - "ERROR:PhysDesignRules - Dangling pins on block... the use of attribute DATA_RATE_OQ set DDR requires connectivity for the CLK0 and CLK1 input pins."

Description

I receive the following error when using the MPMC in Spartan-6:  

 

"ERROR:PhysDesignRules - Dangling pins on block: 

<MPMC_0/mpmc_core_0/gen_spartan6_mcb.s6_phy_top_if/mpmc_mcb_raw_wrapper_0/gen_addr_oserdes2[1].ioi_addr_0>:<OSERDES2_OSERDES2>.  

The use of attribute DATA_RATE_OQ set DDR requires connectivity for the CLK0 and CLK1 input pins." 

 

How do I resolve this issue?

Solution

This issue is resolved with MPMCv5.03.a and EDK 11.3.

AR# 33329
Date Created 08/25/2009
Last Updated 05/23/2014
Status Archive
Type General Article