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AR# 33354

11.3 EDK - ML510 Timing error on NET "Ethernet_MAC/Ethernet_MAC/phy_tx_clk_i" MAXSKEW = 5 ns;

Description

When I build an ML510 design with the xps_ethernetlite Core, I receive the following timing error:

Timing constraint: NET "Ethernet_MAC/Ethernet_MAC/phy_tx_clk_i" MAXSKEW = 5 ns;

1 net analyzed, 1 failing net detected.

1 timing error detected.

Maximum net skew is 5.013ns.

Solution

This is an invalid timing error from the timing engine, and it can be safely ignored. If this is your only timing constraint, you can disable the prevention of creating bitstreams by:

1. In XPS, select the Project pull down menu.

2. Select Project Options.

3. Select the Hierarchy and Flow tab.

4. Deselect "Treat timing closure failure as error".

This problem has been fixed in EDK 11.4, available at:

http://www.xilinx.com/support/download/index.htm

Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
38095 ML510 - Known Issues and Release Notes Master Answer Record N/A N/A
AR# 33354
Date Created 08/28/2009
Last Updated 12/15/2012
Status Active
Type General Article