^

AR# 33404 11.3 EDK, plbv46_pcie_v4_01_a - The Virtex 6 FPGA Endpoint bridge incorrectly sets the NBE interrupt when receiving zero length writes.

The Non-Contiguous Byte Enables (NBE) bit in Bridge Interrupt Register (BIR, Offset 0x40) is incorrectly set for zero length write.
This has been fixed in the latest PLBv46_pcie core to eliminate the erroneous interrupt, and is available in EDK 11.3.

EDK 11.3 is available at:

http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp
AR# 33404
Date Created 09/08/2009
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • More
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Less
Tools
  • EDK - 11.3
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