This problem only happens after a warm reset and does not happen on a power cycle. Once it locks up, a power cycle is required to clear the problem. The core deasserts trn_tdst_rdy_n forever. The issue seems to be rare and does not happen every time a warm reset is issued. The problem is also related to initial credits advertised by the link partner, so it may not occur on all systems.
In v1.12 and later, the wrapper source files are now delivered with the generated core. Place the pcie_blk_ll_credit.v file found in the zip below in the directory: <generated_core_name>/source
If you are using the v1.11 core, you will need to place the file into the folder:
C:\Xilinx\11.1\ISE\coregen\ip\xilinx\network\com\xilinx\ip\pcie_blk_plus_v1_11\pcie_blk_if\pcie_blk_ll
or a similar path for your installation.
Regenerate the v1.11 core from CORE Generator.
The zip containing the workaround is here:
http://www.xilinx.com/txpatches/pub/applications/pci/ar33278_bp_v1_12_files.zip Note that this zip file contains workarounds for other issues in v1.12. Please see the readme.txt in the zip file for more information.
This workaround file should not be used on cores prior to v1.11.
These fixes will be included in the v1.13 Block Plus Core included in ISE Design Suite11.4.
Revision History 07/05/2011 - Updated title
10/26/2009 - Added workaround file.
09/22/2009 - Updated for ISE 11.3 and v1.12 core release
09/08/2009 - Initial Release