AR# 33419 MIG v3.2, Virtex-6 FPGA DDR3 - No support available for CWL=8 for RDIMM devices

The MIG v3.2, a Virtex-6 FPGA DDR3 design does not support CWL=8 for DDR3 RDIMM devices.

Support will be added in MIG v3.3, available with ISE Design Suite 11.4.

AR# 33419
Date Created	09/09/2009
Last Updated	12/15/2012
Status	Active
Type	General Article
Devices	Virtex-6 CXT Virtex-6 HXT Virtex-6 LX More Virtex-6 LXT Virtex-6 SXT Less
IP	MIG

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