Main

MIG v3.2, Virtex-6 FPGA DDR3 - No support available for CWL=8 for RDIMM devices

AR# 33419

Search For Another Answer

Topic MIG
Last Updated 06/14/2011
Status Active
Description

The MIG v3.2, a Virtex-6 FPGA DDR3 design does not support CWL=8 for DDR3 RDIMM devices.

Solution

Support will be added in MIG v3.3, available with ISE Design Suite 11.4.
Applies To

Devices

  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • Virtex-6 LXT
  • Virtex-6 SXT

IP

  • MIG
 
 
/csi/footer.htm