Keywords: iSim
I use the following verilog tasks to write perform a VCD dump for debugging:
$dumpfile("myisim.vcd");
$dumpvars (0, board);
However, when I run the simulation, I encounter the following message:
INFO: Simulator is stopped.
Using "show time", it can be seen that the simulator stopped at 1 ps.
How can I resolve this issue?
This issue can occur if the user attempts to perform a VCD dump of all traceable objects in a large design.
To resolve this issue, please limit the scope of the VCD dump via the $dumpvars verilog task to a relevant section of the design.
This issue is currently under investigation in order to better address this condition in a future release of the ISE Simulator