We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 33446

MIG v3.2, Virtex-6 FPGA RLDRAMII - "ERROR:Bitgen - Could not find programming information" occurs for the XC6VLX760-FF1760 device


When generating a bitstream for the MIG v3.2 RLDRAMII design targeting a XC6VLX760-FF1760, the following error is output in the .bgn report:

ERROR:Bitgen - Could not find programming information for I/O standard DIFF_HSTL_II_T_DCI drive=-1, slew=*, master=*. The programming of the output buffers will not be correct.


This error can be safely ignored and does not affect the behavior of the RLDRAMII design in hardware. This is a false error reported by the tools and will be resolved in ISE Design Suite 11.4.
AR# 33446
Date Created 09/09/2009
Last Updated 12/15/2012
Status Active
Type General Article
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • More
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Less
  • MIG