When generating a bitstream for the MIG v3.2 RLDRAMII design targeting a XC6VLX760-FF1760, the following error is output in the .bgn report:
ERROR:Bitgen - Could not find programming information for I/O standard DIFF_HSTL_II_T_DCI drive=-1, slew=*, master=*. The programming of the output buffers will not be correct.