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LogiCORE XAUI v9.1 - Timeout seen in Spartan-6 FPGA Example Design Timing Simulation

AR# 33491

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Topic IP-DS-XAUI
Last Updated 09/12/2009
Status Active
Description

Keywords:S6, simprim, SimPrim

When running timing simulation with the XAUI Spartan-6 FPGA example design, I can see timeout.

Solution

If Spartan-6 timing simulation is needed with this version of the core, please open a technical support case.

http://www.xilinx.com/support/
 
 
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