When the Serial RapidIO v5.4 core is used with ISE software(instead of batch mode), the ISE 11.3 GUI does not recognize the clock constraints in the UCF file as valid signals. Instead of finding these signals in the phy_1x_ser_clk module, ISE software is expecting them as part of the top-level module.
This issue causes NGDBuild to report the following errors:
ERROR:Parsers:11 - Encountered unrecognized constraint while parsing.
ERROR:NGDBuild:19 - Errors found while parsing constraint file '<core_name>_top.ucf.'
The simplest option to work around this issue is to set the keep_hierarchy option in XST to "soft."
If the keep_hierarchy option is not an acceptable alternative for the specific design, change the following constraints from this:
NET "phy_1x_ser_clk/UCLK" TNM_NET = "UCLK";
NET "phy_1x_ser_clk/UCLK2" TNM_NET = "UCLK2";
NET "phy_1x_ser_clk/UCLK_DV4" TNM_NET = "UCLK_DV4";
TIMESPEC "TS_UCLK" = PERIOD "UCLK" 8.0 ns HIGH 50 % INPUT_JITTER 100 ps PRIORITY 0;
TIMESPEC "TS_UCLK2" = PERIOD "UCLK2" "TS_UCLK" / 2 HIGH 50 % INPUT_JITTER 100 ps PRIORITY 1;
TIMESPEC "TS_UCLK_DV4" = PERIOD "UCLK_DV4" "TS_UCLK" * 4 HIGH 50 % INPUT_JITTER 100 ps PRIORITY 1;
To this:
NET "UCLK" TNM_NET = "UCLK";
NET "UCLK2" TNM_NET = "UCLK2";
NET "LNK_CLK" TNM_NET = "LNK_CLK";
TIMESPEC "TS_UCLK" = PERIOD "UCLK" 8.0 ns HIGH 50 % INPUT_JITTER 100 ps PRIORITY 0;
TIMESPEC "TS_UCLK2" = PERIOD "UCLK2" "TS_UCLK" / 2 HIGH 50 % INPUT_JITTER 100 ps PRIORITY 1;
TIMESPEC "TS_LNK_CLK" = PERIOD "LNK_CLK" "TS_UCLK" * 4 HIGH 50 % INPUT_JITTER 100 ps PRIORITY 1;
Revision History
09/17/2009 - Initial Release
10/23/2009 - Added keep_hierarchy option