Please note that this solution is only applicable under the following two circumstances:
- This issue occurs on a 64-bit NT (Windows) machine.
- The errors are due to missing design primitives (OR2, BUFG, AND, etc.).
If otherwise, the error above can occur due to missing sources in your simulation. Check that all sources associated with your design are included in the ISE tools project or referenced in the ISIM project file.
This is a known issue when using ISE Simulator in ISE Design Suite 11. The issue has been resolved in ISE Design Suite 12.
To download and install the latest version of ISE Design Suite, visit the Download Center at
http://www.xilinx.com/support/download/index.htmISE 11.x WorkaroundTo resolve this issue in ISE Design Suite 11, a patch must be installed. To install the patch, perform the following:
1. Install the latest ISE Design Suite update from the Download Center.
2. Download and decompress the following ZIP file (make sure to keep the folder name hierarchy):
http://www.xilinx.com/txpatches/pub/applications/misc/isim_verilog_libs_win64_11_3.zip3. Follow the instructions contained in the "readme.txt" provided in the ZIP file.
For additional help with this issue, please refer to the Support contact information contained in the "readme.txt" file.