We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 33583

11.3 Timing - WARNING:Timing:3262 - Feedback on DCM or PLL


When I implement an external feedback loop using a Virtex-6 MMCM, I see the following warning reported by PAR, even if the FEEDBACK constraint is properly applied:

WARNING:Timing:3262 - Feedback on DCM or PLL Qam1/CLKcontroller/mmcm_adv_inst

forms an incomplete loop. The Tdcmino calculation will be invalid. If the DCM

or PLL uses external feedback, please apply the FEEDBACK constraint to

indicate the external board delay. Consult the Constraints Guide for further

information on how to apply the FEEDBACK constraint.


This is a known issue. A tactical patch has been released for this issue. Please consult the "AR33583_Timing_11.3_AllPlatforms_ReadMe.txt" file in the ZIP file for details on how to deploy the patch.


This issue is resolved in the 11.4 release of the software.

AR# 33583
Date 12/15/2012
Status Archive
Type General Article
Page Bookmarked