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AR# 33613

MIG v3.2, Virtex-6 DDR2/DDR3 - Design incorrectly assigns app_wdf_mask (user interface data mask) to 0 preventing the ability to mask data.


The MIG v3.2 Virtex-6 DDR2/DDR3 design incorrectly assigns the app_wdf_mask signal to 0 in the top level module.

(For example_design/rtl/ip_top/example_top.v or user_design/rtl/ip_top/core_name.v).

The app_wdf_mask signal is the user interface signal used to provide the mask for app_wdf_data.

Since this signal is tied to '0', it prevents the user from being able to drive the mask from the UI.


To work around this issue, pull the app_wdf_mask signal to a port and comment out the line assigning the signal to 0.

This issue is resolved in MIG v3.3 for DDR3. 

The issue was never fixed for DDR2, and the manual workaround must be followed.  
AR# 33613
Date 10/24/2014
Status Active
Type General Article
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
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  • Virtex-6 LXT
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  • MIG
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