11.3 EDK - xps_ll_temac_v2_02_a "ERROR:EDK:1536 - INSTANCE:Hard_Ethernet_MAC PORT:REFCLK..."
Description
Keywords: mii, gmii, rgmii, 1.3, 2.0, statistics, refclk
Certain TEMAC/PHY types do not require the REFCLK port, but the REFCLK port is needed if statistics are enabled.
The following is a sample error for a Virtex-6 FPGA MII system when connecting the REFCLK port in the MHS to clock and having statistics enabled:
"ERROR:EDK:1536 - INSTANCE:Hard_Ethernet_MAC PORT:REFCLK -
/proj/xco_ip/workspace/mwelter/temac/debug_l_systems/v203a
/integrationTest/V6/V6_Demo_Emb_mii_0911_L.59_130T_error
/system.mhs line 464 - invalid port in use when ISVALID="( C_PHY_TYPE == 1 || C_PHY_TYPE == 2 || C_PHY_TYPE == 3 || (C_TEMAC_TYPE == 2 && C_PHY_TYPE == 0))" evaluates to FALSE. Please remove the port from your design!"
Solution
This issue affects xps_ll_temac_v2_00_a and xps_ll_temac_v2_02_a cores.The following change is needed to include the REFCLK port for all designs that include the statistics block.
1. Make a local copy of the XPS_LL_TEMAC core.
2. Open the data\xps_ll_temac_v2_1_0.mpd in any text editor and modify line 129 from
PORT REFCLK = "", DIR = I, SIGIS = CLK, INITIALVAL = GND, ISVALID = ( C_PHY_TYPE == 1 || C_PHY_TYPE == 2 || C_PHY_TYPE == 3 || (C_TEMAC_TYPE == 2 && C_PHY_TYPE == 0))
to
PORT REFCLK = "", DIR = I, SIGIS = CLK, INITIALVAL = GND, ISVALID = ( C_PHY_TYPE == 1 || C_PHY_TYPE == 2 || C_PHY_TYPE == 3 || (C_TEMAC_TYPE == 2 && C_PHY_TYPE == 0) || (C_TEMAC0_STATS == 1 || C_TEMAC1_STATS == 1))
The first release with this fix is v2.03.a released in EDK 11.4.