We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 33644

Design Advisory for Xilinx Solutions for Forward Error Correction Cores including Virtex-6, Spartan-6, and Virtex-5 FPGA


Design Advisory Answer Records are created for issues that are important to designs currently in progress and are selected to be included in the Xilinx Alert Notification System.


For a list of all current Release Notes and Known Issues for Xilinx Solutions for Digital Communication Cores, please refer to the IP Release Notes Guide:


Virtex-6 and Spartan-6 solution for LTE 3GPP Turbo Encoder v3.0

(Xilinx Answer 33617) LogiCORE 3GPP LTE Turbo Encoder v3.0 - Release Notes/README for 3GPP LTE Turbo Encoder v3.0 rev 1 Patch

To update your Xilinx Alert Notification Preferences, please update your MyProfile page:


Revision History

10/13/2009 - Initial Release; Added 33617

AR# 33644
Date Created 10/13/2009
Last Updated 12/15/2012
Status Active
Type General Article