For a list of all current Release Notes and Known Issues for the Spartan-6 FPGA Integrated Block Wrapper for PCI Express, please refer to the IP Release Notes Guide:
http://www.xilinx.com/support/documentation/ip_documentation/xtp025.pdf
Design Advisories
(Xilinx Answer 33761) - Design Advisory for the Spartan-6 FPGA Integrated Block Wrapper v1.2 for PCI Express - How to Enable use of a 100 MHz Reference Clock
(Xilinx Answer 33774) -Design Advisory for the Spartan-6 FPGA Integrated Block Wrapper v1.2 for PCI Express - 250 MHz Is Not a Valid Reference Clock Option
To update your Xilinx Alert Notification Preferences, please go to:
http://www.xilinx.com/support/myalerts
Revision History
07/05/2011 - Updated title
11/16/2009 - Added new link to access preferences.
11/09/2009 - Initial Release; Added Answer Records 33761 and 33774.
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 33774 | Design Advisory for the Spartan-6 FPGA Integrated Block Wrapper v1.2 for PCI Express - 250 MHz Is Not a Valid Reference Clock Option | N/A | N/A |
| 33761 | Design Advisory for the Spartan-6 FPGA Integrated Block Wrapper v1.2 for PCI Express - How to enable use of a 100 MHz reference clock | N/A | N/A |
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 34536 | Xilinx Solution Center for PCI Express | N/A | N/A |
| 33761 | Design Advisory for the Spartan-6 FPGA Integrated Block Wrapper v1.2 for PCI Express - How to enable use of a 100 MHz reference clock | N/A | N/A |
| 33774 | Design Advisory for the Spartan-6 FPGA Integrated Block Wrapper v1.2 for PCI Express - 250 MHz Is Not a Valid Reference Clock Option | N/A | N/A |