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SPI-3 Link Layer v7.1 - "ERROR:Pack:1653 - At least one timing constraint is impossible to meet.."

AR# 33808

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Topic Telecommunications
Last Updated 04/06/2010
Status Active
Description

The following Map error may occur even after modifying the DCM Phase Shift value as per (Xilinx Answer 34527) in ISE 11.4 or earlier:

 

"ERROR:Pack:1653 - At least one timing constraint is impossible to meet because component delays alone exceed the constraint."

Solution

This issue has been fixed in ISE design tools 11.5.
 
 
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