The following Map error may occur even after modifying the DCM Phase Shift value as per (Xilinx Answer 34527) in ISE 11.4 or earlier:
"ERROR:Pack:1653 - At least one timing constraint is impossible to meet because component delays alone exceed the constraint."
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 32651 | Spartan-6 - ISE Software 11 Update Known Issues related to Spartan-6 FPGA | N/A | N/A |