When performing 64-word NPI bursts in Spartan-6 FPGA MPMC, data is corrupted. The failures occur when two or more bursts occur in close succession. The failures occur more frequently when the NPI clock is slower than the external memory clock. How do I resolve this issue?
To potentially work around this issue, increase the NPI frequency, or add gaps in transaction requests to the NPI.
This is fixed in MPMC v5.04.a, to be released in EDK 11.4.