Known Issue: v1.13, v1.12
CORE Generator software outputs the following messages when I generate the core targeting VHDL flow:
WARNING:sim - endpoint_blk_plus_v1_12/example_design/dual_core/
xilinx_pci_exp_secondary_ep_dual.vhd does not exist, will not be added to ISE project.
WARNING:sim - endpoint_blk_plus_v1_12/example_design/
xilinx_pci_exp_64b_ep.vhd does not exist, will not be added to ISE project.
WARNING:sim - endpoint_blk_plus_v1_12/example_design/
pci_exp_2_lane_64b_ep.v does not exist, will not be added to ISE project.
WARNING:sim - endpoint_blk_plus_v1_12/example_design/
pci_exp_4_lane_64b_ep.v does not exist, will not be added to ISE project.
WARNING:sim - endpoint_blk_plus_v1_12/example_design/
pci_exp_8_lane_64b_ep.v does not exist, will not be added to ISE project.
WARNING:sim - endpoint_blk_plus_v1_12/simulation/tests/
pio_tests.v does not exist, will not be added to ISE project.
WARNING:sim - endpoint_blk_plus_v1_12/simulation/tests/
sample_tests1.v does not exist, will not be added to ISE project.
WARNING:sim - endpoint_blk_plus_v1_12/simulation/tests/
sample_tests2.v does not exist, will not be added to ISE project.
WARNING:sim - endpoint_blk_plus_v1_12/simulation/tests/
tests.v does not exist, will not be added to ISE project.
WARNING:sim - endpoint_blk_plus_v1_12/simulation/dsport/
bar_hit.vhd does not exist, will not be added to ISE project.
WARNING:sim - endpoint_blk_plus_v1_12/simulation/dsport/
trn_port.vhd does not exist, will not be added to ISE project.
WARNING:sim - endpoint_blk_plus_v1_12/simulation/functional/
xilinx_lib_mti.v does not exist, will not be added to ISE project.
WARNING:sim - endpoint_blk_plus_v1_12/simulation/functional/
xilinx_lib_vcs.v does not exist, will not be added to ISE project.
WARNING:sim - endpoint_blk_plus_v1_12/simulation/functional/
xilinx_lib_vnc.v does not exist, will not be added to ISE project.
WARNING:sim - endpoint_blk_plus_v1_12/simulation/
mini_board.vhd does not exist, will not be added to ISE project.