Virtex-6 FPGA Integrated Block Wrapper v1.4 for PCI Express - Cannot Generate x8 GEN 2 Core for LX130T device using -2 speedgrade
Description
Known Issue: v1.4
The CORE Generator software does not allow me to generate a x8 GEN 2 core when I target a Virtex-6 LX130T device in -2 speedgrade.
Solution
To work around this problem, generate the 8-lane Gen2 product for 6VLX130T in a -3 speedgrage, and update the generated UCF for the speedgrade change.
Revision History
12/02/2009 - Initial Release
Applies To
IP
- Virtex-6 FPGA Integrated Endpoint Block for PCI Express