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AR# 33848

LogiCORE IP Image Statistics v1.0 - Why do I receive block RAM collision errors in my simulation?

Description

Why do I receive block RAM collision errors in my simulation?

"Error: Memory Collision Error on RAMB16BWER ::v_stats_v1_0_tb:sysgen_dut:blk000015af: at simulation time ...... ns.

A read was performed on address 00xx (hex) of port B while a write was requested to the same address on Port A. The write will be successful however the read value on port B is unknown until the next CLKB cycle."

Solution

This is a known problem with simulation that isfixed in ISE Design Suite 12.3. It isno longer a problem in the Image Statistics v4.0. This does not affect the hardware because the outputs for the block RAM are not being used at the time the collision occurs.

For a detailed list of LogiCORE Image Statistics Release Notes and Known Issues, see (Xilinx Answer 33748).

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
33748 LogiCORE IP Image Statistics - Release Notes and Known Issues N/A N/A

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
33748 LogiCORE IP Image Statistics - Release Notes and Known Issues N/A N/A
AR# 33848
Date Created 11/24/2009
Last Updated 07/20/2012
Status Archive
Type Release Notes
IP
  • Image Statistics Engine