This Answer Record contains the Release Notes and Known Issues for the Spartan-6 GTP FPGA Transceiver Wizard v1.4 released with ISE tools 11.4 and 11.5.
1. INTRODUCTION
For the most recent updates to the IP installation instructions for this core, please go to:
http://www.xilinx.com/ipcenter/coregen/ip_update_install_instructions.htm
For system requirements:
http://www.xilinx.com/ipcenter/coregen/ip_update_system_requirements.htm
This file contains release notes for the Xilinx LogiCORE IP Spartan-6 FPGA GTP Transceiver Wizard v1.4. For the latest core updates, see the product
page at:
http://www.xilinx.com/products/intellectual-property/S6_FPGA_GTP_Transceiver_Wizard.htm
2. NEW FEATURES
- New package(cs484) added
- New speedgrade -4 is added
- Aurora 8B10B, SATA-I and SATA-II protocol files added
- Brought the PLL dividers to the wrapper level
3. RESOLVED ISSUES
- CR 533553: GUI uses 3 for PLL_DIVSEL_FB which is not a valid value
- CR 536133: Spartan-6 GTP wizard v1.4 GUI allows to select GT REFCLK above 160MHz
4. KNOWN ISSUES
The following are known issues for v1.4 of this core at time of release:
- CR 536826 : The Spartan-6 GSG (gsg546) has incorrect GUI screen shots
- The ISIM doesn't open in GUI mode if you run simulate_isim.sh/bat script
Work Around: Replace "./demo_tb.exe -tclbatch wave_isim.tcl -wdb wave_isim" with
"./demo_tb.exe -gui -tclbatch wave_isim.tcl -wdb wave_isim" in
simulate_isim.sh/bat script
- SATA-I/II protocols are not compliance tested
The most recent information, including known issues, workarounds, and resolutions for this version is provided in the release notes Answer Record
for the ISE 11.4 IP Update at
http://www.xilinx.com/support/documentation/user_guides/xtp025.pdf
5. TECHNICAL SUPPORT
To obtain technical support, create a WebCase at www.xilinx.com/support. Questions are routed to a team with expertise using this product.
Xilinx provides technical support for use of this product when used according to the guidelines described in the core documentation, and
cannot guarantee timing, functionality, or support of this product for designs that do not follow specified guidelines.
6. CORE RELEASE HISTORY
Date By Version Description
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12/02/2009 Xilinx, Inc. 1.4 11.4 release
09/16/2009 Xilinx, Inc. 1.3 11.3 release
06/26/2009 Xilinx, Inc. 1.2 11.2 release
04/24/2009 Xilinx, Inc. 1.1 Beta2
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