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AR# 33880

11.1 EDK - What is the interrupt sensitivity of the XPS Timer (xps_timer_v1_01_b) Core?

Description

When I use the interrupts on the XPS Timer Core, the interrupts appear to be edge sensitive instead of level sensitive.

What is the sensitivity of the XPS Timer Core?

Solution

There is an error in one of the XPS Timer data files (xps_timer_v2_1_0.mpd) which declares that the core is level sensitive. 

The sensitivity of the XPS Timer Core should be edge sensitive.

Option 1: Make the xps_timer_v1_01_b local:

  1. Right-click on the xps_timer core instance in your project.
  2. Select "Make This IP Local".
  3. Browse into your project's pcores directory.
  4. Open the xps_timer_v1_01_b\data\xps_timer_v2_1_0.mpd file in a text editor.
  5. Change line 91:


From:

PORT Interrupt = "", DIR = O, SIGIS = INTERRUPT, SENSITIVITY = LEVEL_HIGH, INTERRUPT_PRIORITY = HIGH

To:

PORT Interrupt = "", DIR = O, SIGIS = INTERRUPT, SENSITIVITY = EDGE_RISING, INTERRUPT_PRIORITY = HIGH


Option 2: Make the fix globally:

  1. Change line 91 in the file below:

    C:\Xilinx\11.1\EDK\hw\XilinxProcessorIPLib\pcores\xps_timer_v1_01_b\data\xps_timer_v2_1_0.mpd

    from:

    PORT Interrupt = "", DIR = O, SIGIS = INTERRUPT, SENSITIVITY = LEVEL_HIGH, INTERRUPT_PRIORITY = HIGH

    to:

    PORT Interrupt = "", DIR = O, SIGIS = INTERRUPT, SENSITIVITY = EDGE_RISING, INTERRUPT_PRIORITY = HIGH


  2. Open C:\Xilinx\11.1\EDK\hw\XilinxProcessorIPLib\pcores\__MpdDataBase.txt (this is a cache of all the peripheral cores installed for EDK)

  3. Find the xps_timer_v1_01_b section in the file and make the same changes as performed in Step 1.


This problem is scheduled to be fixed in the 12.1 release.

AR# 33880
Date Created 11/30/2009
Last Updated 07/08/2014
Status Active
Type General Article
Tools
  • EDK - 11.1
  • EDK - 11.2
IP
  • XPS Timer Counter