LogiCORE IP Display Port v1.1 - DCM Wrapper needs to be changed to use high-frequency mode for the Display Port Receiver Sink Example design to work properly under all cirumstances

Description

DCM Wrapper needs to be changed to use the high-frequency mode for the Display Port Receiver Sink Example design in order to work properly under all circumstances.

Currently, it is set to run in low-frequency mode which, in some circumstances, causes it to run outside of the operating frequency DCM specifications.

Solution

To correct a problem where the DCM operation can end up running outside of the operational frequency for the DCM low-frequency specification, make the following changes to the DCM wrapper for the Display Port Sink example design. 

This keeps the clkout0 and clkout2 clocks at the same frequency, only it takes the dcm out of div_2 mode and puts it into high-frequency mode.  

The modifications need to be made to the dport_rx_phy.v file. 

Starting on line 2285, the DCM needs to be modified as follows:

1. Change the DCM to high frequency mode 
2. Take the DCM out of divide_by_2 mode 
3. Change the clkin_period to 3.704 
4. Remove the BUFG instance on the CLKIN; CLKIN should now be connected directly to i_clkout0 
5. Move i_clkout2 from clk0 to CLKDV 
6. Connect CLK0 to a new signal i_clkout0_dcm 
7. Add a bufg to i_clkout0_dcm, with the output called i_clkout0_buf 

For a detailed list of LogiCORE IP Display Port Release Notes and Known Issues, see (Xilinx Answer 33258).