Main
Home  :  Support  :  Answers  :  LogiCORE IP Display Port v1.1 - Why is my HSYNC timing incorrect when using the dual pixel mode for some frequencies?

LogiCORE IP Display Port v1.1 - Why is my HSYNC timing incorrect when using the dual pixel mode for some frequencies?

AR# 33887

Search For Another Answer
Topic IP-DSP MVI
Last Updated 12/01/2009
Status Active
Description

Keywords: display port, HSYNC, horizontal sync, dual pixel, 2 pixel

Why is my HSYNC timing incorrect when using the dual pixel mode for some frequencies?

Solution

This is a known bug in the Display Port v1.1.

Please see (Xilinx Answer 33258) for a detailed list of LogiCORE Display Port Release Notes and Known Issues.

 
 
/csi/footer.htm