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AR# 34015

Virtex-6 FPGA Embedded Tri-mode Ethernet MAC Wrapper v1.3 - The example design MMCM parameter values can cause Map errors or result in marginal operation

Description

When the 16-bit client interface is selected, the Virtex-6 FPGA Embedded Tri-Mode Ethernet MAC Wrapper example design wrapper uses MMCM parameter values which can cause Map errors if configured for 2.5 Gb/s, or marginal operation if configured for 1 Gb/s or 2 Gb/s.

Solution

The ISE design tools 11.5 release of the Virtex-6 FPGA Embedded Tri-Mode Ethernet MAC Wrapper provides correct MMCM parameterization. For earlier core releases, the MMCM parameter values should be updated as follows:

 

For 1 Gb/s speeds:


CLKFBOUT_MULT_F: from 4.0 to 5.0
CLKOUT0_DIVIDE_F: from 4.0 to 5.0
CLKOUT1_DIVIDE: from 8 to 10

For 2 Gb/s or 2.5 Gb/s speeds:

CLKFBOUT_MULT_F: from 4.0 to 5.0
CLKOUT0_DIVIDE_F: from 2.0 to 2.5
CLKOUT1_DIVIDE: from 4 to 5

Linked Answer Records

Master Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
34019 ISE Design Suite 11.4.1 - Known Issues for Virtex-6 FPGA Service Pack N/A N/A
AR# 34015
Date Created 01/11/2010
Last Updated 05/23/2014
Status Archive
Type Known Issues
Devices
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Virtex-6 CXT
Tools
  • ISE Design Suite - 11.2
  • ISE Design Suite - 11.3
  • ISE Design Suite - 11.4
IP
  • Virtex-6 FPGA Embedded Tri-mode Ethernet MAC Wrapper