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AR# 34143

Virtex-6 FPGA GTX Transceiver Wizard - Example MMCM causes errors


When I implement a design that utilizes the example MMCM instantiation generated by the GTX Transceiver Wizard, errors similar to the following occur:

"ERROR:PhysDesignRules:1997 - The computed value for the VCO operating frequency of MMCM_ADV instance txoutclk_mmcm0_i/mmcm_adv_i is calculated to be 468.750000 MHz. This falls below the operating range of the MMCM VCO frequency for this device of 600.000000 - 1440.000000 MHz. Please adjust either the input frequency CLKINx_PERIOD, multiplication factor CLKFBOUT_MULT_F or the division factor DIVCLK_DIVIDE, in order to achieve a VCO frequency within the rated operating range for this device."


"ERROR:PhysDesignRules:2063 - A CLKFBOUT_MULT_F setting of 4.0 for MMCM_ADV (block txoutclk_mmcm0_i/mmcm_adv_i) can not be supported at this time."

For designs using 11.4 ISEdesign toolsor previous versions, these issues do not error out, but might cause failures on the board.

This Answer Record discusses what actions can be taken to re-generate the MMCM to work around these errors.


These errors are related to the new MMCM requirements for CLKFBOUT_MULT_F and the VCO minimum frequency of 600 MHz.

To work around these errors, the MMCM instance needs to be updated with correct settings:

  1. Determine the clock frequencies required.
    • Input clock frequencyis either the reference clock rate (if that was selected in the GTX Wizard), or line rate/20 (if TXOUTCLK was selected).
    • Output clock frequenciesare line rate/20 for TXUSRCLK, and a multiple of that depending on fabric data width for TXUSRCLK2. See the TX and RX Interface sections of theVirtex-6 FPGA GTX Transceivers Advance Product Specification User Guide (UG366) for additional information.
  2. Use the Clocking Wizard to generate new settings.
    • Input the clock frequencies required from the previous calculations into the Clocking Wizard.
    • For ISE software versions 11.4 and previous, after entering the appropriate values in the wizard a few adjustments must be made:
      • Go to page 4 of the Clocking Wizard and enter override mode
      • If necessary, adjust the CLKFBOUT_MULT_F and DIVCLK_DIVIDE values until CLKFBOUT_MULT_F is not equal to 1, 2, 3, or4 or a fractional value, and the VCO frequency meets the new minimum requirement
      • For all later ISE software releases, the output file of the Clocking Wizardwill have new attribute settings that will be correct.
  3. Update the example design to use the updated settings
    • In the example_design directory, the file with the suffix _top.v(hd) contains the instantiation for the clock module containing the MMCM. Update the parameters being passed to this module with the new divider settings from the Clocking Wizard.

Linked Answer Records

Associated Answer Records

AR# 34143
Date Created 02/05/2010
Last Updated 12/15/2012
Status Active
Type General Article
  • Virtex-6 CXT
  • Virtex-6 LX
  • Virtex-6 LXT
  • Virtex-6 SXT
  • ISE Design Suite - 11.3
  • ISE Design Suite - 11.4