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AR# 34165

MIG v3.3, Spartan-6 FPGA MCB - Incorrect port connection causes Continuous DQS Tuning to behave incorrectly - Manual modification required

Description

The MIG Spartan-6 FPGA MCB design includes a Continuous DQS Tuning circuit. This circuit ensures proper read data capture across voltage/temperature shift by adjusting DQS internally. Continuous DQS Tuning is enabled in all MIG v3.3 MCB designs. For detailed information on Continuous DQS Tuning, please see the MCB Operation > Calibration section of the Spartan-6 FPGA Memory Controller User Guide (ug388).

The MCB wrapper file (mcb_raw_wrapper) provided with MIG v3.3 incorrectly port maps the DQS increment and decrement signals. This causes the Continuous DQS Tuning circuit to increment when a decrement is needed and vice versa. This answer record details the changes required to work around this problem. All MIG v3.3 Spartan-6 FPGA MCB designs require this change.

Solution

Resolution Steps

Step 1

Open the mcb_raw_wrapper.v/.vhd module. This is located in both the 'example_design/rtl' and 'user_design/rtl' directories.

Step 2

Locate the MCB instantiation. Within the instantiation,the DQS increment/decrement signals are port mapped. The current instantiation of the MCBhas the following port assignments (notice the inc and dec portion of the net names):
.UIUDQSDEC (mcb_ui_udqs_inc),
.UIUDQSINC (mcb_ui_udqs_dec),
.UILDQSDEC (mcb_ui_ldqs_inc),
.UILDQSINC (mcb_ui_ldqs_dec),
Step 3
Change the port mapping as follows:
.UIUDQSDEC (mcb_ui_udqs_dec),
.UIUDQSINC (mcb_ui_udqs_inc),
.UILDQSDEC (mcb_ui_ldqs_dec),
.UILDQSINC (mcb_ui_ldqs_inc),

AR# 34165
Date Created 01/19/2010
Last Updated 12/15/2012
Status Active
Type General Article
IP
  • MIG