11.x ChipScope - IBERT - Spartan-6, Virtex-5, Virtex-6 - PCS loopback results in an increasing error count
Description
When I set my GT to near-end PCS loopback, I see the bit error rate increasing. Is there an issue with my device?
Solution
This is a result of clock settings in the core. As a work-around, use PMA near-end loopback. Alternatively, you can change the Loopback mode to Near-End PMA and then change back to Near-End PCS. Reset Error count and note that no errors occur.Applies To
Devices
- Spartan-6 LXT
- Virtex-5 TXT
- Virtex-5 SXT
- Virtex-6 LXT
- Virtex-6 SXT
- Virtex-5 FXT
- Virtex-5 LXT
- Virtex-6 CXT
Boards & Kits
- Spartan-6 FPGA SP605 Evaluation Kit
- Spartan-6 FPGA Connectivity Kit
- Spartan-6 FPGA Embedded Kit