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AR# 34218

LogiCORE IP DSP48 Macro - How do the A, B, and D inputs on the DSP48 Macro map to the various registers in the XtremeDSP Slice variants?

Description

How do the A, B, and D inputs on the DSP48 Macro map to the various registers in the XtremeDSP Slice variants?

Solution

A similar table is scheduled to be added to the next release of the DSP48 Macro Data Sheet:

DSP48 Macro Virtex-6
(pre-adder)
Virtex-6
(nopre-adder)
Virtex-5 Virtex-4 Spartan-6 Spartan-3A DSP
D D n/a n/a n/a D D
A3 A1 A1 A1 A1 B0 B0
A4 AD A2 A2 A2 B1 B1
B3 B1 B1 B1 B1 A0 A0
B4 B2 B2 B2 B2 A1 A1

For a detailed list of LogiCORE IP DSP48 Macro Release Notes and Known Issues, see (Xilinx Answer 33537).

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
33537 LogiCORE IP DSP48 Macro - Release Notes and Known Issues N/A N/A

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
33537 LogiCORE IP DSP48 Macro - Release Notes and Known Issues N/A N/A
AR# 34218
Date Created 01/22/2010
Last Updated 12/15/2012
Status Active
Type General Article