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AR# 34226

11.4 EDK, XPS IIC - How do I probe the XPS_IIC tri-state signals with ChipScope?

Description

How do I probe the XPS_IIC tri-state signals with ChipScope?

Why is the _O signal tied to GND when I probe the tri-state signals inside the XPS IIC Core?

Solution

The IIC signals SDA and SCL are connected to an IOBUF. The input to the IOBUF is always tied to ground, so the signal on the I/O line is effectively controlled by the _T signal.

Following is the logic table for a Virtex-5 FPGA IOBUF:

Logic Table
Inputs Bidirectional Outputs
T I IO O
1 X Z X
0 1 1 1
0 0 0 0

When I is '0' and T is '0', the output is '0'.

When T is '1', outputis high 'Z'. But, since IIC signals are both pull-up, it is pulled to '1' on the line.

AR# 34226
Date Created 01/28/2010
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Virtex-5 LXT
Tools
  • ISE Design Suite - 11.4
IP
  • XPS IIC Bus Interface