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AR# 34259 Block Memory Generator v3.3 - Virtex-6 Block RAM Read First mode address space overlap (?collision?) issue with simultaneous Read and Write may cause memory corruption

Block RAM memory corruption may occur under the Block RAM configurations and conditions as described in (Xilinx Answer 34859). See the details below to identify Block Memory Generator configurations that have changed to avoid the issue, and identify those which will be susceptible to corruption.

Users generating Virtex-6 block memory design using block Memory Generator versions earlier than v3.4 should migrate to v3.4 rev 1, available in ISE software 11.5. In v3.4 rev1, the Block Memory Generator (BMG) will handle various configurations as follows:
  1. When the user selects the options Simple Dual Port (SDP) and Fixed Primitives of size 512x72 or 512x36:
    • BMG Implementation: Internally, BMG will instead use two 1024x36 or two 1024x18 primitives respectively
    • Impact: Memory utilization doubles
  2. When the user selects the options SDP and Fixed Primitives of sizes other than 512x72, 512x36 primitives:
    • BMG Implementation: No Change, the core is already implemented as True Dual Port Block RAM in WRITE_FIRST mode
    • Impact: None
  3. When the user selects ECC (option supported only with RAMB36E1 512x72 primitive):
    • BMG Implementation: No Change
    • Impact: User has to design around the address overlap issue as described in (Xilinx Answer 34859)
  4. When the user selects the options SDP and Minimum Area or Low Power algorithm:
    • BMG Implementation: Internally, BMG will avoid use of 512x72 and 512x36 primitives
    • Impact: Memory utilization may double, depending on the user depth and width selected
  5. When the user selects the options TDP along with RF, WF, or NC modes
    • BMG Implementation: No Change
    • Impact: When write_mode= Read First, the user must consider the address overlap issue as described in (Xilinx Answer 34859)
AR# 34259
Date Created 02/05/2010
Last Updated 10/18/2010
Status Active
Type
Devices
  • Virtex-6 CXT
  • Virtex-6 LX
  • Virtex-6 LXT
  • Virtex-6 SXT
Tools
  • ISE Design Suite - 11.1
  • ISE Design Suite - 11.2
  • ISE Design Suite - 11.3
  • More
  • ISE Design Suite - 11.4
  • ISE Design Suite - 11.5
  • Less
IP
  • Block Memory Generator
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