UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 34260

Design Assistant for PCI Express - trn_terr_drop_n Asserted when Transmitting a Valid Packet

Description

Why does the signal trn_terr_drop_n assert when transmitting a valid packet?

Note: This Answer Record is a part of the Xilinx Solution Center for PCI Express (Xilinx Answer 34536). The Xilinx Solution Center for PCI Express is available to address all questions related to PCIe.Whether you're starting a new design with PCIe or troubleshooting a problem, use the Solution Center for PCIe to guide you to the right information.

Solution

This signal might assert if you have streaming enabled, but then throttle the packet by deasserting trn_tsrc_rdy_n. When streaming is enabled by asserting trn_tstr_n, you must provide the packet without throttling during middle of the packet (from trn_tsof_n to trn_teof_n). If you throttle the packet when trn_tstr_n is enabled, this signal asserts indicating there is an error.

Revision History
07/30/2011 - Initial Release

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
34536 Xilinx Solution Center for PCI Express N/A N/A
36049 Design Assistant for PCI Express - TRN User Application Interface Questions N/A N/A

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
34538 Xilinx Solution Center for PCI Express - Design Assistant N/A N/A
AR# 34260
Date Created 07/29/2011
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Virtex-6 LXT
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 SXT
IP
  • Virtex-6 FPGA Integrated Block for PCI Express ( PCIe )