Please refer to the following documentation when using MIG.
NOTE: This answer record is part of the Xilinx MIG Solution Center (Xilinx Answer 34243).
The Xilinx MIG Solution Center is available to address all questions related to MIG.
Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.
UltraScale Memory Interface Solutions
Please visit the UltraScale MIG Documentation Centre, which includes:
UltraScale FPGAs Memory Interface Performance Specifications
Please visit the UltraScale FPGAs Data Sheets Documentation Center, which includes:
7 Series Memory Interface Solutions
Please visit the 7 Series MIG documentation center, which includes:
WP383 - Achieving High Performance DDR3 Data Rates in Virtex-7 and Kintex-7 FPGAs
7 Series FPGAs Memory Interface Performance Specifications
Please visit the 7 Series FPGAs Data Sheets Documentation Center, which includes:
Spartan-6 and Virtex-6 Memory Interface Solutions
Please visit the MIG Virtex-6 and Spartan-6 Documentation Centre, which includes:
Each MIG User Guide includes sections dedicated to Memory Interface Board/Pinout Guidelines.
Please visit the above noted User Guide specific to your MIG design.
Virtex-5 Memory Interface Solutions
Spartan-3 Generation Memory Interface Solutions
Virtex-4 Memory Interface Solutions
|11/15/2011||Updated to point to MIG documentation pages|
|04/06/2011||Added WP383 and XAPP868|
|03/01/2011||Added 7 Series Memory Interface Documentation|