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AR# 34286 MIG Design Assistant - Virtex-6 DDR2/DDR3 Hardware

Description


This section of the MIG Design Assistant focuses on hardware usage and debug for the Virtex-6 DDR3/DDR2 designs. Please select from the optionsbelow to find information related to your specific question.
NOTE: This Answer Record is part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.

Solution

(Xilinx Answer 34308) Pin-out and Banking Requirements
(Xilinx Answer 34544) Board Layout
(Xilinx Answer 34588) Board Debug - Includes Calibration and Data Error Debug

Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
34544 MIG Virtex-6 DDR2/DDR3 - Board Layout N/A N/A
34266 Xilinx Virtex-6 MIG Solution Center - Design Assistant N/A N/A
34588 MIG Virtex-6 DDR2/DDR3 - Board Debug including general debug, calibration debug, and data error debug N/A N/A
34308 MIG Virtex-6 DDR3/DDR2 - Verify pin-out/banking requirements are met N/A N/A

Actions

AR# 34286
Date Created 05/18/2010
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • More
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Less
IP
  • MIG
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