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AR# 34351

MIG v3.3, Spartan-6 FPGA MCB DDR2 - When disabling ODT through the MIG tool, the ODT pin still exists in the design

Description

When generating a MIG v3.3 Spartan-6 FPGA MCB DDR2 design and disabling RTT (nominal) - ODT, the ODT pin is incorrectly allocated in the output design.

Solution

To work around the incorrect pin allocation,use the following procedureto recover the ODT pin for GPIO usage:

1. Comment out the generate statement for the gen_dram_odt inside the mcb_raw_wrapper.v. For example:

//generate
//if(C_MEM_TYPE == "DDR3" || C_MEM_TYPE == "DDR2" ) begin : gen_dram_odt
//OBUFT iob_odt (.O(mcbx_dram_odt),.I(ioi_odt),.T(t_odt));
//end
//endgenerate

2. Comment out the mcbx_dram_odt pin LOC and IOSTANDARD constraints in the MIG provided UCF file. For example:

NET "mcb3_dram_odt" IOSTANDARD = SSTL18_II;
NET "mcb3_dram_odt" LOC = "L6" ;

3. Comment out the mcbx_dram_odt ports and port mappings in both the memcx_wrapper.v and the top level module (ie - example_top.v or core_name.v).

This is resolved in MIG 3.4, available with ISE Design Suite12.1.

AR# 34351
Date Created 02/10/2010
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Spartan-6 LX
  • Spartan-6 LXT
  • Spartan-6Q
IP
  • MIG