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AR# 34393 MIG Virtex-6 DDR2/DDR3 - Performance

Description

This section of the MIG Design Assistant focuses on the performance of the Virtex-6 DDR3/DDR2 designs. Please select from the below options to find information related to your specific question.

Note: This Answer Record is a part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.

Solution

For information on frequency support for MIG Virtex-6 DDR3/DDR2 design, please see:
(Xilinx Answer 34391)- Frequency Support

For information on the read latency for MIG Virtex-6 DDR3/DDR2 design, please see:
(Xilinx Answer 35793)- Read Latency

For information on the efficiency of MIG Virtex-6 DDR3/DDR2 design, please see:
(Xilinx Answer 34392)- Efficiency

Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
35793 MIG Virtex-6 DDR2/DDR3 - Read Latency N/A N/A
34282 MIG Design Assistant - Virtex-6 Core Functionality N/A N/A
34391 MIG Virtex-6 DDR2/DDR3 - Frequency Support N/A N/A
34392 MIG 7 Series and Virtex-6 DDR2/DDR3 Soluction Center Design Assistant - Reorder Controller Efficiency N/A N/A
34317 MIG Virtex-6 DDR3/DDR2 - Usage of Inner Column for Address/Control Group N/A N/A
34390 MIG Virtex-6 DDR3/DDR2 - Usage of Inner/Outer Columns for Data Group N/A N/A

Actions

AR# 34393
Date Created 05/24/2010
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • More
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Less
IP
  • MIG
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