Yes, the Spartan-6 LX and LXT devices share a common die. Utilizing derived die is an industry-wide common strategy. It allows customer benefits such as lower cost and faster time to market for production devices. Xilinx has optimized the packaging and testing of LX and LXT devices to lower the cost of LX devices relative to LXT, including not bonding out the transceivers in LX devices and optimizing the pin-outs within the LX and LXT families, but not across the families. For this reason, prototyping with LX and moving to LXT is not recommended and is not a Xilinx supported strategy. Additionally, the bitstreams are incompatible as the JTAG IDCODEs are different (implemented through a bonding option). The placement of the GTP block in LX and LXT die can create some routability challenges for logic near the GTP block. Xilinx ISE tools attempt to optimize placement to minimize this issue.