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AR# 34506

11.1 EDK, MPMC v5.00.a - Virtex-5 debug register address range incorrect

Description

The Virtex-5 MPMG MIG-PHY debug registers have an overlap of address ranges between V5_CALIB_DQS_TAP_CNT8 and V5_CALIB_GATE_TAP_CNT0.  What is the correct range? 

From the MPMC datasheet 11.4, page 52:

V5_CALIB_DQS_TAP_CNT8 0x24c0
...
V5_CALIB_GATE_TAP_CNT0 0x24c0

Solution

V5_CALIB_DQS_CNT0 should start at 0x2480 and end at V5_CALIB_DQS_CNT8 at 0x24A0.

This issue is fixed in the v6.00.a MPMC datasheet, to be released in EDK 12.1.

AR# 34506
Date Created 03/02/2010
Last Updated 05/23/2014
Status Archive
Type General Article
Devices
  • Virtex-5 FXT
  • Virtex-5 LX
  • Virtex-5 LXT
  • More
  • Virtex-5 SXT
  • Virtex-5 TXT
  • Virtex-5Q
  • Less
Tools
  • EDK - 11.1
  • EDK - 11.2
  • EDK - 11.3
  • EDK - 11.4
IP
  • Multi-Port Memory Controller (MPMC)