UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 34609

12.x EDK - Master Answer Record List

Description

This Master Answer Record contains a list of all EDK 12.x Answer Records. The list contains current known issues as well as those issues resolved in a particular release.

Solution

Known Issues with 12.1, 12.2, 12.3, 12.4:

(Xilinx Answer 35593) 12.1 EDK - What patches are currently available for EDK?
(Xilinx Answer 18265) 12.1 EDK - "ERROR: Unable to connect to PowerPC target. Invalid Processor Version No 0x00000000"
(Xilinx Answer 21533) 12.1 EDK - How do I reduce the size of the executable program (".elf" file)?
(Xilinx Answer 21639) 12.1 EDK - How do I divide the .text section of the three different .text file sections on different memories in Linker script?
(Xilinx Answer 21775) 12.1 EDK - How can I pass XST switches?
(Xilinx Answer 22480) 12.1 EDK - Are there target-specific definitions for the MicroBlaze and PowerPC processors?
(Xilinx Answer 23025) 12.1 EDK - How do I generate a GNU linker MAP file with XPS?
(Xilinx Answer 23390) 12.1 EDK - How can I make my SDRAM controller visible in the Linker Script Generation GUI?
(Xilinx Answer 24458) 12.1 EDK - Is ModelSim XE supported by EDK?
(Xilinx Answer 24759) 12.1 EDK - When I use the FPU in a PPC design, there seem to be random interrupts
(Xilinx Answer 25252) 12.1 EDK - An error message occurs when I attempt to convert an ".elf" file to binary file using mb-objcopy
(Xilinx Answer 29828) 12.x EDK - Why does the xps_ll_temac result in an evaluation license warning?
(Xilinx Answer 29864) 12.1 EDK - I cannot download bitstreams to the targeted FPGA, even though I can accomplish this with iMPACT
(Xilinx Answer 30878) 12.1 EDK - My software application operates improperly after a CPU reset
(Xilinx Answer 31059) 12.1 EDK - How can I interface EDK block RAM with the FPGA fabric?
(Xilinx Answer 31448) 12.1 EDK, MPMC v6.00.a - What is the maximum memory size that MPMC supports?
(Xilinx Answer 32253) 12.1 EDK - Network Windows users and the need to install M/S Redistribution Libraries
(Xilinx Answer 32607) 12.1 EDK - How do I set up my peripherals in VxWorks to use Real Time Process (RTP) projects and cache?
(Xilinx Answer 32784) 12.1 EDK - Why is data not sent through my PCI card on my ML510 / ML410 system?
(Xilinx Answer 33075) 12.1 EDK - Mfsgen errors generating large image files
(Xilinx Answer 33300) 12.1 EDK, MPMC v6.00.a - SDMA hangs when using narrow external memory widths
(Xilinx Answer 33359) 12.1 EDK - How can I get Asian characters to work in SDK?
(Xilinx Answer 33704) 12.1 EDK - Attempting to connect to XMD results in "ERROR:EDK:970 - Cse lookup device returned irlen of 0..."
(Xilinx Answer 33731) 12.1 EDK - Why are the WindRiver WTX polled mode tests failing?
(Xilinx Answer 33817) 12.2 EDK, MPMC v6.00.a, Virtex-6 - ERROR:ConstraintSystem:58 - Constraint does not match any design objects
(Xilinx Answer 34290) 12.1 EDK - fatal error - cygheap base mismatch detected
(Xilinx Answer 34375) 12.1 EDK - "ERROR:Xst:2212 - "C:\Reference design\project\synthesis\lmb_bram_wrapper_xst.prj""
(Xilinx Answer 34381) 12.1 EDK - Why does the SDK provided lwIP echo server design not work?
(Xilinx Answer 34382) 12.1 EDK, xps_uartlite, xps_uart16550 - Do the EDK UARTs support flow control?
(Xilinx Answer 34430) 12.1 EDK - "system.make:189 *** target pattern contains no '%'"
(Xilinx Answer 34431) 12.1 EDK - cc1: error: unrecognized command line option "-T/cygdrive/i/proj/Test/src/Test.ld"
(Xilinx Answer 34472) 12.1 EDK, PLBv46 RC/EP Bridge for PCI Express (v4.04a) - Is the EDK PCIe core Gen2 compliant?
(Xilinx Answer 34484) 12.1 EDK - How can I simulate an Ethernet design with packet transmission and reception?
(Xilinx Answer 34575) 12.1 EDK - Embedded Linux hangs on reset for the PowerPC405
(Xilinx Answer 34607) 12.1 EDK - "ERROR:EDK:3557 - SimGen does not support Spartan-3E architecture from EDK 12.1"
(Xilinx Answer 34608) 12.1 EDK - What do I need to do to migrate my software application from 11.x SDK to 12.1 SDK?
(Xilinx Answer 34610) 12.1 EDK - Is OPB and PLBv34 supported in12.1?
(Xilinx Answer 34616) 12.1 EDK - The "genace.tcl" file does not include the ML510 board JTAG information
(Xilinx Answer 34716) 12.1 EDK, MPMCv5.04.a - "Launch MIG" button is greyed out in EDK 12.1 and later
(Xilinx Answer 34717) 12.1 EDK,MPMC v6.00.a - ERROR:EDK:1558 - PORT MPMC_Clk_Wr_I0 not found in mpd
(Xilinx Answer 34778) 12.1 EDK - "ERROR:EDK:1550 - cannot find MPD for the pcore core_name_v1_01_a in any of the repositories"
(Xilinx Answer 34787) 12.1 EDK - I receive cable lock errors when connected with XMD
(Xilinx Answer 34804) 12.1 EDK - SDK error: xparameters.h: No such file or directory
(Xilinx Answer 34807) 12.1 EDK -After profiling has been performed on my 64-bit computer, the results do not appear
(Xilinx Answer 35021) 12.1 EDK - After I issue the restart command on the ISim console, the reset and clock sequences no longer toggle
(Xilinx Answer 35056) 12.1 EDK, XPS_LL_TEMAC_v2_03_a - Updated Data Sheet
(Xilinx Answer 35095) 12.1 EDK - XPS has trouble running backend tools or appears to freeze when running Xflow
(Xilinx Answer 35140) 12.1 EDK - How do I generate a MSK file with Data2mem to verify my bitstream?
(Xilinx Answer 35165) 12.1 EDK - Why Does Base System builder allow me to create a design that has timing errors?
(Xilinx Answer 35166) 12.1 EDK - How can I get the newer Spansion flashes to work with the Xilflash library?
(Xilinx Answer 35167) 12.1 EDK - "ERROR:EDK - linux_2_6 () - cygwin warning: MS-DOS style path detected"
(Xilinx Answer 35251) 12.1 EDK, XPS_IIC - Does the XPS_IIC core support clock stretching?
(Xilinx Answer 35296) 12.1 EDK - Xilinx Platform Studio's startup page brings up an error window
(Xilinx Answer 35306) 12.1 EDK - How do I install additional Cygwin packages?
(Xilinx Answer 35396) 12.1 EDK - Why does SDK rerun Library Generator (libgen) after selecting clean?
(Xilinx Answer 35400) 12.1 EDK - What has changed with the new device drivers in 12.1?
(Xilinx Answer 35443) 12.1 EDK - SDK cannot find my custom software driver updates in the local project directory
(Xilinx Answer 35454) 12.1 EDK - Can I connect to multiple programming cables from XMD?
(Xilinx Answer 35486) 12.1 EDK - PLBv46_PCIe BARs and BME are disabled by default and completion packets not sent if BME = 0
(Xilinx Answer 35533) 12.1 EDK - "ERROR:HDLParsers:3014 - "../addr_reg_cntr_brst_flex.vhd" Line 163. Library unit plbv46_slave_v1_04_a is not available in library plbv46_pcie_v4_04_a_plbv46_slave_v1_04_a"
(Xilinx Answer 35545) 12.1 EDK - SDK compile error "make: /bin/sh: Command not found"
(Xilinx Answer 35580) 12.1 EDK - XMD crashes when using ChipScope tool plug-ins
(Xilinx Answer 35592) 12.1 EDK - XPS creates an incorrect bitwidth for my cores
(Xilinx Answer 35593) 12.1 EDK - What patches are currently available for EDK?
(Xilinx Answer 35594) 12.1 EDK - The Spartan-6 SP605 board contains an incorrect clock pin location for the PCIe core
(Xilinx Answer 35619) 12.1 EDK - "ERROR: "ld:region ilmb_cntlr_dlmb_cntlr is full""
(Xilinx Answer 35622) 12.1 EDK - "ERROR:EDK:1526 32 bit-width connector assigned to 16 bit-width port"
(Xilinx Answer 35623) 12.1 EDK - Some Xilinx Boards are missing from Base System Builder (BSB)
(Xilinx Answer 35648) 12.1 EDK - "ERROR:EDK:3409 - Error calling proc : syntax error"
(Xilinx Answer 35656) 12.1 EDK - BSB-generated designs for Spartan-6using XPS_LL_TEMAC have IDELAYCTRL related parameters set
(Xilinx Answer 35698) 12.1 EDK - What version of the Modelsim simulator is supported in EDK 12.1?
(Xilinx Answer 35734) 12.1 EDK - Files with a capital .C extension in a managed C project will not build in SDK
(Xilinx Answer 35741) 12.1 EDK - "ERROR:EDK - xget_handle parent : A NULL handle was provided"
(Xilinx Answer 35764) 12.1 EDK - "ERROR:EDK - microblaze_0 (microblaze) - can't read "limits": no such variable"
(Xilinx Answer 35784) 12.1 EDK - CIP Wizard does not work well when importing a Slave only FSL IP
(Xilinx Answer 35794) 12.1 EDK - The xps_usb driver has incorrect call back in the interrupt handler
(Xilinx Answer 35837) 12.1 EDK - How do you launch two Debug Configurations simultaneously for a dual-processor system
(Xilinx Answer 35852) 12.1 EDK, xps_timebase_wdt_v1_01_a - WDT_RESET output may combinatorially glitch
(Xilinx Answer 35856) 12.1 EDK - "Error: Xst:2585 - Port of instance does not exist in definition"
(Xilinx Answer 35898) 12.1 EDK, MPMC v6.00.a - ERROR:EDK:422 - PARAMETER C_MCB_LOC has value MEMC5 which is not allowed...
(Xilinx Answer 35903) 12.1 EDK, UARTLite - Why do UART errors rates increase with higher baud and lower clock frequencies?
(Xilinx Answer 35951) 12.1 EDK - Software Development Kit (SDK) "Program FPGA" dialog does not open
(Xilinx Answer 35965) 12.1 EDKCompiling a Software application gives a Fatal Error in Asian versions of Windows XP
(Xilinx Answer 35975) 12.1 EDK - INSTANCE:dcr_v29_0 - Superseded core for architecture 'virtex5fx'
(Xilinx Answer 35985) 12.1 EDK, mii_to_rmii - ERROR:EDK - Ethernet_MAC (xps_ethernetlite) - expected integer but got """
(Xilinx Answer 35996) 12.1 EDK - SDK "download operation timed out" error
(Xilinx Answer 36026) 12.1 EDK - Data2mem does not produce correct mem files for PowerPC or MicroBlaze simulations
(Xilinx Answer 36027) 12.1 EDK - lwIP arp reply is of maximum size
(Xilinx Answer 36036) 12.1 EDK- PlanAhead/ChipScope software flow is broken when there is an ICON in the EDK submodule
(Xilinx Answer 36050) 12.1 EDK - How to debug the XPS design when there is no output on terminal?
(Xilinx Answer 36054) 12.1 EDK, XAPP1026 - Do you have LWIP application examples available in 12.1?
(Xilinx Answer 36086) 12.1 EDK - When doing a BFM simulation, I get Error: (vsim-4008) Object 'read_cmd(24:31)' not found
(Xilinx Answer 36087) 12.1 EDK, MPMC - ERROR:EDK:3193 Not able to find a suitable memory CAS latency for frequency
(Xilinx Answer 36091) 12.1 EDK - SDK could not find the frame base for "main" in debugging
(Xilinx Answer 36194) 12.1 EDK - Xilfatfs library usage example
(Xilinx Answer 36347) 12.1 EDK - I/O Buffers are inserted when using a EDK design as a sub-module in an ISE project
(Xilinx Answer 36350) 12.1 EDK - How are the block RAM instantiated in the EDK BRAM_Block?
(Xilinx Answer 36353) 12.1 EDK - Does the PLBv46_PCI core support Spartan-6 devices?
(Xilinx Answer 36375) 12.1 EDK, XPS_TFT - How can I store a 176x144 image stored in memory as 640x480?
(Xilinx Answer 36376) 12.1 EDK - "ERROR:EDK:1405 - File not found in any repository 'plbv46_slave_burst_v1_00_a/hdl/vhdl/xxx.vhd'"
(Xilinx Answer 36380) 12.1 EDK - Why is there noise in the UART terminal when I load my ML501 board from a System ACE file?
(Xilinx Answer 36390) 12.1 EDK - Export to SDK does not update the bit file in the workspace if hardware XML is not updated
(Xilinx Answer 36403) 12.1 EDK - SDK results in the following java exception: "java.io.EOFException..."
(Xilinx Answer 36404) 12.1 EDK - How can I launch the Insight GDB GUI?
(Xilinx Answer 36496) 12.1 EDK - Why does SDK not contain the bootloader generator feature in Program Flash Utility?
(Xilinx Answer 36574) 12.1 EDK - How do I add additional parameter defintions for lwIP?
(Xilinx Answer 36586) 12.1 EDK - make all src/mysource.d:1: *** multiple target patterns. Stop.
(Xilinx Answer 36592) 12.1 EDK - How do I add custom logic to a MicroBlaze system?
(Xilinx Answer 36803) 12.1 EDK, PLB - How can I add more than the maximum number of supported Masters or Slaves to a bus?
(Xilinx Answer 36932) 12.1 EDK - My EDK simulations are not working
(Xilinx Answer 36980) 12.1 EDK - IP catalog does not show the pcores when there is a custom pcore in the repository
(Xilinx Answer 37051) 12.1 EDK, MPMC - Will MPMC support 64-bit DDR3 in Virtex-6?
(Xilinx Answer 37123) 12.1 EDK - The Hello World SDK sample application requires the UART Lite or UART 16550
(Xilinx Answer 37240) 12.1 EDK - MicroBlaze Linux image does not boot from SystemACE
(Xilinx Answer 37319) 12.1 EDK, MicroBlaze FSL - How do I read the status of the FSL before a read/write?
(Xilinx Answer 37426) 12.1 EDK - The MicroBlaze project does not properly return from a xil_printf call when function-sections and gc-sections switches are used
(Xilinx Answer 37429) 12.1 EDK - multiple definition of '_interrupt_handler'
(Xilinx Answer 37617) 12.1 EDK - undefined reference to 'xil_io_out32'
(Xilinx Answer 37619) 12.1 EDK - Why does pushing the Restart button in SDK cause the target request to fail?
(Xilinx Answer 37626) 12.1 EDK - Data2mem produces an error on a bitstream file created with quad SPI setting
(Xilinx Answer 37894) 12.1 EDK - FSL debugging fails in SDK
(Xilinx Answer 37914) 12.1 EDK, xps_ll_temac - How do I set the low-level parameters on the Ethernet MAC?
(Xilinx Answer 38178) 12.1 EDK - "ERROR:EDK:3165 - elfcheck failed" when using two contiguous LMB blocks
(Xilinx Answer 38390) 12.1 EDK, MPMC v6.00.a - VFBC data corruption occurs when writing command when data FIFO almost full/empty
(Xilinx Answer 38391) 12.1 EDK, MPMC v6.00.a - MPMC driver hangs when using SDRAM PHY
(Xilinx Answer 38393) 12.1 EDK, MicroBlaze - Hang during TLB miss
(Xilinx Answer 38394) 12.1 EDK - XPS Central DMA hangs during writes
(Xilinx Answer 38592) 12.1 EDK - mb-gcc does not properly pack structures using bitfields
(Xilinx Answer 38833) 12.1 EDK - How can I use the Platform Flash XL on the SP605 or ML605 boards?
(Xilinx Answer 38853) 12.1 EDK - My PCIe design on the ML506 board does not meet timing
(Xilinx Answer 39083) 12.1 EDK - Possible solutions to store the embedded software in external non-volatile memory
(Xilinx Answer 39095) 12.1 EDK - EDK cannot find the netlist of a custom core synthesized with a user mechanism
(Xilinx Answer 39127) 12.1 EDK - How do I connect a third-party cable to debug PowerPC 440 on the ML507 development board?
(Xilinx Answer 39463) 12.1 EDK - Make IP Local function does not copy over IP in Global Repositories
(Xilinx Answer 39667) 12.1 EDK - "ERROR: Debug Operation Not Supported on the Target"
(Xilinx Answer 39817) 12.1 EDK - Editing linker script manually does not cause a rebuild in SDK
(Xilinx Answer 40335) 12.1 EDK - How to use Synplify to synthesize a design which includes EDK subsystem?

(Xilinx Answer 31750) 12.2 EDK - Error window states "Makefile cannot be saved to run process. Please ensure IP's in MHS point to the right MPD."
(Xilinx Answer 33817) 12.2 EDK, MPMC v6.00.a, Virtex-6 - "ERROR:ConstraintSystem:58 - Constraint does not match any design objects"
(Xilinx Answer 36777) 12.2 EDK - SDK Tactical Patch
(Xilinx Answer 37271) 12.2 EDK - ML605 BSB design uses P30_CS_SEL rather than FPGA_FCS_B as CE of BPI Flash
(Xilinx Answer 37274) 12.2 EDK - Block Diagram does not show Local Link connection properly
(Xilinx Answer 37276) 12.2 EDK - How can I change Export to SDK directory?
(Xilinx Answer 37593) 12.2 EDK, xps_sysmon - Where are the VP/VN I/O signals?
(Xilinx Answer 37634) 12.2 EDK, PPC440MC_DDR2 - WARNING:EDK - : Bit 8:9 of C_PPC440MC_CONTROL is set to 00
(Xilinx Answer 37758) 12.2 EDK - Helloworld application does not work with UART16550
(Xilinx Answer 37991) 12.2 EDK - Concepts Tools and Techniques (EDK_CTT.pdf) link is incorrect
(Xilinx Answer 38175) 12.2 EDK - Terminate called after throwing an instance of 'boost::exception_detail::clone_impl
(Xilinx Answer 38262) 12.2 EDK - "ERROR:NgdBuild:604 logical block could not be resolved..."
(Xilinx Answer 38357) 12.2 EDK, MPMC v6.01.a - Incorrect DDR2 ODT setting for Spartan-6 FPGA
(Xilinx Answer 38372) 12.2 EDK - I cannot open any files by double-clicking them within XPS
(Xilinx Answer 38392) 12.2 EDK, MicroBlaze - Small instruction cache size causes incorrect execution
(Xilinx Answer 38395) 12.2 EDK, MicroBlaze - WIC fails to invalidate instruction cache
(Xilinx Answer 38417) 12.2 EDK - "ERROR:EDK:3710 - INSTANCE:RS232_Uart_2 PORT:ctsN - ../system.mhs line 425 - isvalid port in use..."
(Xilinx Answer 38631) 12.2 EDK, XAPP1053 - Is there a SPI Flash bootloader available in 12.x?

(Xilinx Answer 37174) 12.3 EDK - AXI_Ethernet_v1_00_a - Recommended Constraints for AXI-based Ethernet systems
(Xilinx Answer 37425) 12.3 EDK, 12.3 ISE - How do I create a custom AXI IP core?
(Xilinx Answer 37618) 12.3 EDK - Base System Builder shows revision 1.0 of boards SP601, SP605, and ML605 for AXI designs
(Xilinx Answer 37638) 12.3 EDK, AXI_Ethernet_v1_00_a - Usage of the AVB Endpoint feature with AXI_Ethernet in EDK
(Xilinx Answer 37658) 12.3 EDK - lwIP updates for AXI
(Xilinx Answer 37785) 12.3 EDK - "ERROR:EDK:3464 - Invalid architecture 'qvirtex5' specified in XMP file"
(Xilinx Answer 37812) 12.3 EDK - "ERROR:EDK:3452 - IPNAME:bram_block INSTANCE:microblaze_0_bram_block"
(Xilinx Answer 37816) 12.3 EDK - "ERROR:HDLCompiler:69 - "core_0_wrapper.v" Line 118: is not declared."
(Xilinx Answer 37856) 12.3 EDK - How do I use EDK AXI IP cores in a system with no processor?
(Xilinx Answer 37962) 12.3 EDK, AXI CDMA v1.00.a - Scatter/Gather operations hang when using delayed interrupts
(Xilinx Answer 37972) 12.3 EDK, AXI CDMA - Why does the example_sg_poll.c use interrupts?
(Xilinx Answer 38209) 12.3 EDK - Failed to load XMD option file: etc/xmd_microblaze_0.opt
(Xilinx Answer 38272) 12.3 EDK - SDK crashes on Linux with a SIGSERV error when creating a new workspace
(Xilinx Answer 38273) 12.3 EDK - AXI instruction cache stream is not supported for MicroBlaze
(Xilinx Answer 38274) 12.3 EDK - Base System Builder generates 8 kB of LMB when I select 128 kB for the ML605
(Xilinx Answer 38275) 12.3 EDK - INFO:EDK:1398 - File "system.mss" could not be opened for reading
(Xilinx Answer 38382) 12.3 EDK - AXI Ethernet appears to lockup on startup
(Xilinx Answer 38388) 12.3 EDK - "ERROR:Xst:2647 - Failed to run core generator for macro"
(Xilinx Answer 38389) 12.3 EDK - Interrupts cause multiple accesses to peripheral, corrupting data on PowerPC 440 designs
(Xilinx Answer 38412) 12.3 EDK - AXI_Ethernet-v1.00.a - Statistics counter operation is incorrect when using Virtex-6 hard TEMAC running at 10/100 Mbps
(Xilinx Answer 38440) 12.3 EDK, AXI_V6_DDRx - ERROR:MapLib:1002 - IDELAYCTRL processing failed. IDELAYCTRL symbol ... have the same IODELAY_GROUP constraint
(Xilinx Answer 38441) 12.3 EDK, AXI_V6_DDRx - "ERROR:Xst:1672 - TIMEGRP 'TG_clk_rsync_rise' already defined"
(Xilinx Answer 38456) 12.3 EDK - XPS_EPC configuration GUI allows incorrect parameter settings
(Xilinx Answer 38476) 12.3 EDK, MPMC - How do I create or debug a MPMC SDR SDRAM design?
(Xilinx Answer 38509) 12.3 EDK, AXI_DMA - Where can I find the loopback hardware widget for AXI_DMA?
(Xilinx Answer 38526) 12.3 EDK - Why does Base System Builder insert a FIFO for my AXI Ethernet?
(Xilinx Answer 38616) 12.3 EDK, MPMC - SDMA will not assert TX source ready until the TX destination is ready
(Xilinx Answer 38680) 12.3 EDK, MPMC - "ERROR:EDK:3900 - There have been changes to this design that have changed the number of external memory pins"
(Xilinx Answer 38690) 12.3 EDK - New XBD format for Base System Builder
(Xilinx Answer 38730) 12.3 EDK, MPMC v6.02.a - VFBC on Virtex-6 produces corrupted video if block RAM read FIFO is selected
(Xilinx Answer 38745) 12.3 EDK, AXI_V6_DDRx - ERROR:Place:911 - CONFIG DCI_CASCADE = "26,25" is not a valid constraint
(Xilinx Answer 38881) 12.3 EDK, XPS Central DMA - How can I use a Central DMA properly in my EDK design
(Xilinx Answer 38890) 12.3 EDK -XPS_LL_TEMAC v2.03.a - "ERROR:Xst:528 - Multi-source in Unit on signal ; this signal is connected to multiple drivers."
(Xilinx Answer 38948) 12.3 EDK - axi_usb2_device_v1_00_a - Error: (vsim-3733) ... (Generic 'c_m_axi_supports_threads' is not on the entity.)
(Xilinx Answer 38980) 12.3 EDK, MicroBlaze - No output on AXI IC or DC interfaces when cache disabled
(Xilinx Answer 38982) 12.3 EDK, Chipscope_AXI_Monitor - "ERROR:EDK:1526 - 64 bit-width connector assigned to 32 bit-width port"
(Xilinx Answer 38983) 12.3 EDK, Chipscope_AXI_Monitor - "ERROR:EDK:1405 - File not found in any repository"
(Xilinx Answer 39017) 12.3 EDK - I cannot program my serial flash device
(Xilinx Answer 39064) 12.3 EDK, UART Lite - The same UART Lite code works in 11.5, but not in 12.x
(Xilinx Answer 39070) 12.3 EDK, AXI_PLBv46_Bridge - Hangs when using AXI4-Lite slave interface
(Xilinx Answer 39071) 12.3 EDK - How do I close timing on EDK AXI designs?
(Xilinx Answer 39105) 12.3 EDK, AXI_EMC - Does EMC support synchronous burst mode of flash devices?
(Xilinx Answer 39107) 12.3 EDK, XPS_HWICAP - What is the maximum frequency for the ICAP_Clk in Spartan-6?
(Xilinx Answer 39300) 12.3 EDK, PLBv46_PCIe v4.05.a - Does not work in Root Complex mode
(Xilinx Answer 39412) 12.3 EDK, AXI_GPIO - ip2bus_wrack and ip2bus_rdack are 'X' during simulation
(Xilinx Answer 39449) 12.3 EDK - Launching Questa from within XPS GUI
(Xilinx Answer 39489) 12.3 EDK - lwIP Echo Server example does not work with AXI Ethernet Lite systems
(Xilinx Answer 39491) 12.3 EDK - "ERROR:EDK - microblaze_0 (microblaze) - syntax error in expression "$value != 0.0": extra tokens at end of expression"
(Xilinx Answer 39530) 12.3 EDK, xps_timer v1.02.a - Interrupt is not generated again after two timers output interrupt simultaneously
(Xilinx Answer 39533) 12.3 EDK, MPMC - Integrated MIG GUI flow only generates one clock enable for dual-rank SODIMMs
(Xilinx Answer 39552) 12.3 EDK, MPMC - "ERROR:EDK:3900 - issued from TCL procedure"
(Xilinx Answer 39607) 12.3 EDK - "ERROR:EDK:2905 - Invalid property 'C_UART_WIDTH' added in MHS"

(Xilinx Answer 39459) 12.4 EDK - My Base System Builder design fails timing on the SP605 board at 100 MHz
(Xilinx Answer 39461) 12.4 EDK - Where can I obtain the patch for the new MPDX executable?
(Xilinx Answer 39930) 12.4 EDK, AXI_Ethernet - ERROR:EDK:1419 - For point-2-point interface connector 'ethernet_dma_rxd'
(Xilinx Answer 40051) 12.4 EDK, AXI_DMA - ** Fatal: (vsim-3421) Value 52 is out of range 0 to 51.
(Xilinx Answer 40388) 12.4 EDK, AXI_V6_DDRx - Controller hangs during simulation

Issues Resolved with 12.1:

(Xilinx Answer 31981) 11.1 EDK - Why does all of my logic associated with the FSL bus and the connected peripheral get removed?
(Xilinx Answer 24875) 11.1 EDK - powerpc-eabi-objump -S does not intermix assembly with the source code
(Xilinx Answer 30218) 11.1 EDK - When I launch SDK from XPS, I receive the error message "... workspace currently in use"
(Xilinx Answer 33550) 11 EDK - Flashwriter does not program dual-die flash parts
(Xilinx Answer 30590) 11.1 EDK - mb-gcc errors out when used with -G16
(Xilinx Answer 31442) 11.1 EDK - I cannot add my custom IP core to my EDK design
(Xilinx Answer 32266) 11.1 EDK - I am unable to disable a watch point that I set in SDK
(Xilinx Answer 32699) 11 EDK - "ERROR:EDK:1519 - ... address space overlap!"
(Xilinx Answer 33012) 11.1 EDK - ISE adding an "-lp ?" switch to EDK's system_incl.make
(Xilinx Answer 33318) 11 EDK - SDK does not launch from my Linux workstation
(Xilinx Answer 32309) 11 EDK - My newly created driver is not available for use in SDK
(Xilinx Answer 34240) 11 EDK - After adding a peripheral, the clock connections are no longer connected
(Xilinx Answer 33876) 11 EDK - Base System Builder (BSB) appears to stop when I frequently use the back / forward buttons while generating a generic board
(Xilinx Answer 33935) 11.4 EDK - XPS GUI "Ports -> Make External" sets the name as __NOC__ for external signals
(Xilinx Answer 33926) 11 EDK - Why don't any of my extra compiler flags that I add in XPS work?
(Xilinx Answer 34061) 11 EDK - "error: 'DestPtr' undeclared (first use in this function)"
(Xilinx Answer 33663) 11 EDK - Why does the design summary not show up for my EDK system?
(Xilinx Answer 33359) 11 EDK - How can I get Asian characters to work in SDK?
(Xilinx Answer 33991) 11.4 EDK - "ERROR: The bus clock < 83.000000 > for the MPMC is invalid"
(Xilinx Answer 34107) 11.4 EDK - MMCM divide parameter and its effect on Clock Generator
(Xilinx Answer 35161) 11.5 EDK - Clock generator wizard does not launch with blank message ERROR:EDK -
(Xilinx Answer 34631) 11 EDK - "WARNING:MDT - PORT:I_ADDRTAG CONNECTOR:i_lmb_M_ADDRTAG - microblaze_v2_1_0.mpd line 126 - floating connection!"
(Xilinx Answer 35300) 11.4 EDK -MicroBlaze - Processor stall occurs when TLB set to inhibit caching
(Xilinx Answer 35061) 11.5 EDK -plbv46_slave - Potential BRAM collisions require EDK 12.1 for Spartan-6 FPGA production use
(Xilinx Answer 34742) 11.5 EDK -plbv46_pcie_v4_04_a - Potential block RAM collisions require EDK 12.1 for Spartan-6 FPGA production use
(Xilinx Answer 33936) 11.1 EDK -ppc440mc_ddr2 - Memory failures occur when using a burst length of 8
(Xilinx Answer 35060) 11.5 EDK -XPS_CAN_v3_00_a - Potential block RAM collisions require EDK 12.1 for Spartan-6 FPGA production use
(Xilinx Answer 35298) 11.4 EDK -XPS_IIC_v2_02_a - Accessing Crontel device hangs interface
(Xilinx Answer 34230) 11.4 EDK -XPS_SPI - What is the clock relationship between SPI and PLB clocks in SPI slave mode?
(Xilinx Answer 33924) 11.4 EDK - Why does the TFT controller not get assigned its driver?
(Xilinx Answer 33880) 11 EDK - What is the interrupt sensitivity of the XPS Timer (xps_timer_v1_01_b) Core?
(Xilinx Answer 34692) 11.4 EDK -XPS_LL_TEMAC_v2_03_a - WARNING:EDK:3453 - IPNAME:Soft_TEMAC PROPERTY:GTX_CLK_0 - Failure in evaluating ISVALID expression
(Xilinx Answer 35058) 11.5 EDK -XPS_LL_TEMAC_v2_03_a - Potential BRAM collisions require EDK 12.1 for Spartan-6 FPGA production use
(Xilinx Answer 32654) 10.1 EDK Sp3 -plbv46_pci_v1_03_a - After PCI RST_n reset assertion, the PCI to PLB writes can be terminated and reset is needed to recover
(Xilinx Answer 24134) 10.1 EDK - "ERROR:Xst:1688 - Unknown option for -intstyle switch"
(Xilinx Answer 32044) 10.1 EDK - rm: WARNING: Circular directory structure.
(Xilinx Answer 24746) 9.1i EDK - Using a Cygwin version earlier than 1.5-17 can cause errors at runtime
(Xilinx Answer 25278) 9.1i EDK - "ERROR:MDT - Section .xxxx contents (0x40000000-0xd713) does not completely fit -- elfcheck"

Issues Resolved with 12.2:
(Xilinx Answer 35435) 11.1 EDK, XPS_MCH_EMC - Write-to-write flash timing violated
(Xilinx Answer 34614) 11.4 EDK - ML510 BSB C_PPC440MC_ROW_CONFLICT_MASK and C_PPC440MC_BANK_CONFLICT_MASK are incorrect
(Xilinx Answer 34535) 11.4 EDK - SP601 / SP605 Memory Controller operating at 800 Mb/s
(Xilinx Answer 34689) 11.5 EDK - SDK cannot start on Linux - JVM terminated. Exit code=127
(Xilinx Answer 35147) 11.5 EDK, XPS_MOST_NIC_v1_01_a - Potential block RAM collisions require EDK 12.1 for Spartan-6 production use
(Xilinx Answer 34381) 12.1 EDK - Why does the SDK provided lwIP echo server design not work?
(Xilinx Answer 34778) 12.1 EDK - "ERROR:EDK:1550 - cannot find MPD for the pcore "core_name_v1_01_a" in any of the repositories"
(Xilinx Answer 35021) 12.1 EDK - After I issue the restart command on the ISim console, the reset and clock sequences no longer toggle
(Xilinx Answer 35166) 12.1 EDK - How can I get the newer Spansion flashes to work with the Xilflash library?
(Xilinx Answer 35167) 12.1 EDK - ERROR:EDK - linux_2_6 () - cygwin warning: MS-DOS style path detected
(Xilinx Answer 35563) 12.1 EDK - Does the Xilinx in system flash library (libxilisf) support Winbond Flash parts?
(Xilinx Answer 35580) 12.1 EDK - XMD crashes when using ChipScope tool plug-ins
(Xilinx Answer 35592) 12.1 EDK - XPS creates an incorrect bitwidth for my cores
(Xilinx Answer 35698) 12.1 EDK - What version of the Modelsim simulator is supported in EDK 12.1?
(Xilinx Answer 35794) 12.1 EDK - The xps_usb driver has incorrect call back in the interrupt handler
(Xilinx Answer 35852) 12.1 EDK, xps_timebase_wdt_v1_01_a - WDT_RESET output may combinatorially glitch
(Xilinx Answer 35898) 12.1 EDK, MPMC v6.00.a - "ERROR:EDK:422 - PARAMETER C_MCB_LOC has value MEMC5 which is not allowed..."
(Xilinx Answer 35900) 12.1 EDK, XPS_HWICAP - Read commands do not assert done
(Xilinx Answer 35975) 12.1 EDK - INSTANCE:dcr_v29_0 - Superseded core for architecture 'virtex5fx'
(Xilinx Answer 35996) 12.1 EDK - SDK"download operation timed out" error
(Xilinx Answer 36291) MIG, MPMC, Spartan-6 MCB - Memory failures occur on initial configuration

Issues Resolved with 12.3:
(Xilinx Answer 30053) 10.1 EDK - "ERROR: Debug Memory Access Check Failed, DCR bridges are not accessible from XMD"
(Xilinx Answer 34804) 12.1 EDK - SDK error: xparameters.h: No such file or directory
(Xilinx Answer 34616) 12.1 EDK - The "genace.tcl" file does not include the ML510 board JTAG information
(Xilinx Answer 37240) 12.1 EDK - MicroBlaze Linux image does not boot from SystemACE
(Xilinx Answer 37123) 12.1 EDK - The Hello World SDK sample application requires the UART Lite or UART 16550
(Xilinx Answer 36980) 12.1 EDK - IP Catalog does not show the pcores when there is a custom pcore in the repository
(Xilinx Answer 37758) 12.2 EDK - Helloworld application does not work with UART16550

Linked Answer Records

Child Answer Records

Answer Number Answer Title Version Found Version Resolved
40461 12.4 Data2MEM - Data2MEM is producing empty MEM files N/A N/A
40430 12.4 EDK - AXI IP reset signal is not identified correctly in the CIP Wizard N/A N/A
40139 12.1 EDK - make: *** [implementation/mb0_xps_reg_if_cntlr_wrapper.ngc] Segmentation fault N/A N/A
39928 EDK - How do I let the tools know my custom IP has buffers instantiated so extra buffers are not added? N/A N/A
39817 12.1 EDK - Editing linker script manually does not cause a rebuild in SDK N/A N/A
39667 12.1 EDK - ERROR: Debug Operation Not Supported on the Target N/A N/A
39491 12.3 EDK - "ERROR:EDK - microblaze_0 (microblaze) - syntax error in expression "$value != 0.0": extra tokens at end of expression" N/A N/A
39489 12.3 EDK - lwIP Echo Server example does not work with AXI Ethernet Lite systems N/A N/A
39463 12.1 EDK - Make IP Local function does not copy over IP in Global Repositories N/A N/A
39461 12.4 EDK - Where can I obtain the patch for the new MPDX executable? N/A N/A
39459 12.4 EDK - My Base System Builder design fails timing on the SP605 board at 100 MHz N/A N/A
39127 12.1 EDK - How do I connect a third-party cable to debug PowerPC 440 on the ML507 development board? N/A N/A
39095 12.1 EDK - EDK cannot find the netlist of a custom core synthesized with a user mechanism N/A N/A
39083 12.1 EDK - Possible solutions to store the embedded software in external non-volatile memory N/A N/A
38853 12.1 EDK - My PCIe design on the ML506 board does not meet timing N/A N/A
38833 12.1 EDK - How can I use the Platform Flash XL on the SP605 or ML605 boards? N/A N/A
38690 12.3 EDK - New XBD format for Base System Builder N/A N/A
38592 12.1 EDK - mb-gcc does not properly pack structures using bitfields N/A N/A
38275 12.3 EDK - INFO:EDK:1398 - File "system.mss" could not be opened for reading N/A N/A
38274 12.3 EDK - Base System Builder generates 8 kB of LMB when I select 128 kB for the ML605 N/A N/A
38273 12.3 EDK - AXI instruction cache stream is not supported for MicroBlaze N/A N/A
38272 12.3 EDK - SDK crashes on Linux with a SIGSERV error when creating a new workspace N/A N/A
38262 12.2 EDK - "ERROR:NgdBuild:604 logical block could not be resolved..." N/A N/A
38175 12.2 EDK - Terminate called after throwing an instance of 'boost::exception_detail::clone_impl N/A N/A
37816 12.3 EDK - "ERROR:HDLCompiler:69 - "core_0_wrapper.v" Line 118: is not declared." N/A N/A
37812 12.3 EDK - "ERROR:EDK:3452 - IPNAME:bram_block INSTANCE:microblaze_0_bram_block" N/A N/A
37658 12.3 EDK - lwIP updates for AXI N/A N/A
37619 12.1 EDK - Why does pushing the Restart button in SDK cause the target request to fail? N/A N/A
37618 12.3 EDK - Base System Builder shows revision 1.0 of boards SP601, SP605, and ML605 for AXI designs N/A N/A
37617 12.1 EDK - undefined reference to 'xil_io_out32' N/A N/A
37429 12.1 EDK - multiple definition of '_interrupt_handler' N/A N/A
37425 12.3 EDK, 12.3 ISE - How do I create a custom AXI IP core? N/A N/A
37240 12.1 EDK - MicroBlaze Linux image does not boot from SystemACE N/A N/A
37123 12.1 EDK - The Hello World SDK sample application requires the UART Lite or UART 16550 N/A N/A
36980 12.1 EDK - IP catalog does not show the pcores when there is a custom pcore in the repository N/A N/A
36586 12.1 EDK - make < target > : *** multiple target patterns. Stop. N/A N/A
36496 12.1 EDK - Why does SDK not contain the bootloader generator feature in Program Flash Utility? N/A N/A
36404 12.1 EDK - How can I launch the Insight GDB GUI? N/A N/A
36194 12.1 EDK - Xilfatfs library usage example N/A N/A
36086 12.1 EDK - When doing a BFM simulation, I get Error: (vsim-4008) Object 'read_cmd(24:31)' not found N/A N/A
36050 12.1 EDK - How to debug the XPS design when there is no output on terminal? N/A N/A
35975 12.1 EDK - INSTANCE:dcr_v29_0 - Superseded core for architecture 'virtex5fx' N/A N/A
35951 12.1 EDK - Software Development Kit (SDK) "Program FPGA" dialog does not open N/A N/A
35947 12.1 EDK - SDK Error: Could not find frame base for "<Function Name>" N/A N/A
35794 12.1 EDK - The xps_usb driver has incorrect call back in the interrupt handler N/A N/A
35784 12.1 EDK - CIP Wizard does not work well when importing a Slave only FSL IP N/A N/A
35741 12.1 EDK - ERROR:EDK - xget_handle parent : A NULL handle was provided N/A N/A
35698 12.1 EDK - What version of the Modelsim simulator is supported in EDK 12.1? N/A N/A
35656 12.1 EDK - BSB-generated designs for Spartan-6 using XPS_LL_TEMAC have IDELAYCTRL related parameters set N/A N/A
35648 12.1 EDK - ERROR:EDK:3409 - Error calling proc <:clockrequirements::update_clock_on_port>: syntax error N/A N/A
35592 12.1 EDK - XPS creates an incorrect bitwidth for my cores N/A N/A
35580 12.1 EDK - XMD crashes when using ChipScope tool plug-ins N/A N/A
35533 12.1 EDK - "ERROR:HDLParsers:3014 - "../addr_reg_cntr_brst_flex.vhd" Line 163. Library unit plbv46_slave_v1_04_a is not available in library plbv46_pcie_v4_04_a_plbv46_slave_v1_04_a" N/A N/A
35454 12.1 EDK - Can I connect to multiple programming cables from XMD? N/A N/A
35443 12.1 EDK - SDK Cannot Find Custom Software Driver Updates in the Local Project Directory N/A N/A
35435 11.1 EDK, XPS_MCH_EMC - Write-to-write flash timing violated N/A N/A
35400 12.1 EDK - What has changed with the new device drivers in 12.1? N/A N/A
35396 12.1 EDK - Why does SDK rerun Library Generator (libgen) after selecting clean? N/A N/A
35167 12.1 EDK - ERROR:EDK - linux_2_6 () - cygwin warning: MS-DOS style path detected N/A N/A
35166 12.1 EDK - How can I get the newer Spansion flashes to work with the Xilflash library? N/A N/A
35165 12.1 EDK - Why Does Base System builder allow me to create a design that has timing errors? N/A N/A
35095 12.1 EDK - XPS has trouble running backend tools or appears to freeze when running Xflow N/A N/A
34807 12.1 EDK - After profiling has been performed on my 64-bit computer, the results do not appear N/A N/A
34804 12.1 EDK - SDK error: xparameters.h: No such file or directory N/A N/A
34658 XPS_LL_TEMAC and changing PHY TYPE parameter N/A N/A
34616 12.1 EDK - The "genace.tcl" file does not include the ML510 board JTAG information N/A N/A
34610 12.1 EDK - Is OPB and PLBv34 supported in 12.1? N/A N/A
34608 12.1 EDK - What do I need to do to migrate my software application from 11.x SDK to 12.1 SDK? N/A N/A
34607 12.1 EDK - "ERROR:EDK:3557 - SimGen does not support Spartan-3E architecture from EDK 12.1..." N/A N/A
34575 12.1 EDK - Embedded Linux hangs on reset for the PowerPC405 N/A N/A
34484 12.1 EDK - How can I simulate an Ethernet design with packet transmission and reception? N/A N/A
34431 12.1 EDK - cc1: error: unrecognized command line option "-T/cygdrive/i/proj/Test/src/Test.ld" N/A N/A
34430 12.1 EDK - "system.make:189 *** target pattern contains no '%'" N/A N/A
34381 12.1 EDK - Why does the SDK provided lwIP echo server design not work? N/A N/A
34375 12.1 EDK - "ERROR:Xst:2212 - "C:\Reference design\project\synthesis\lmb_bram_wrapper_xst.prj"" N/A N/A
33840 XPS_LL_TEMAC_v2_03_a - Tactical Patch to Allow Connection of External PCS/PMA Core in Spartan-6 Devices N/A N/A
33731 12.1 EDK - Why are the WindRiver WTX polled mode tests failing? N/A N/A
33359 12.1 EDK - How can I get Asian characters to work in SDK? N/A N/A
33075 12.1 EDK - Mfsgen errors generating large image files N/A N/A
32784 12.1 EDK - Why is data not sent through my PCI card on my ML510 / ML410 system? N/A N/A
32607 12.1 EDK - How do I set up my peripherals in VxWorks to use Real Time Process (RTP) projects and cache? N/A N/A
32253 12.1 EDK - Network Windows users and the need to install M/S Redistribution Libraries N/A N/A
30878 13.1 EDK - My Software Application Operates Improperly after a CPU Reset N/A N/A
29864 12.1 EDK - I cannot download bitstreams to the targeted FPGA, even though I can do this with iMPACT N/A N/A
29828 12.x EDK - Why does the xps_ll_temac result in an evaluation license warning? N/A N/A
25252 14.2 EDK - An error message occurs when I attempt to convert an ".elf" file to binary file using mb-objcopy N/A N/A
24759 12.1 EDK - When I use the FPU in a PPC design, there seem to be random interrupts N/A N/A
24458 12.1 EDK - Is ModelSim XE supported by EDK? N/A N/A
22480 12.1 EDK - Are there target-specific definitions for the MicroBlaze and PowerPC processors? N/A N/A
21775 13.1 EDK - How can I pass XST switches? N/A N/A
21639 12.1 EDK - How do I divide the ".text" section of the three different ".text" file sections on different memories in Linker script? N/A N/A
21533 12.1 EDK - How do I reduce the size of the executable program (".elf" file)? N/A N/A
18265 12.1 EDK - "ERROR: Unable to connect to PowerPC target. Invalid Processor Version No 0x00000000" N/A N/A
14894 EDK - Where are the GNU tools source code? N/A N/A
40516 12.4/13.1 EDK AXI_Ethernet - AXI Ethernet hardware needs extra delays for accessing the registers after a core reset N/A N/A
38526 12.3 EDK - Why does Base System Builder insert a FIFO for my AXI Ethernet? N/A N/A
39017 12.3 EDK - I cannot program my serial flash device N/A N/A
36359 13.1 EDK - ERROR:NgdBuild:76 - File "../implementation/pwm_lights_0_wrapper.ngc" cannot be N/A N/A
36380 12.1 EDK - Why is there noise in the UART terminal when I load my ML501 board from a System ACE file? N/A N/A
35996 12.1 EDK - SDK "download operation timed out" error N/A N/A
36026 12.1 EDK - Data2mem does not produce correct mem files for PowerPC or MicroBlaze simulations N/A N/A
35593 12.1 EDK - What patches are currently available for EDK? N/A N/A
35594 12.1 EDK - The Spartan-6 SP605 board contains an incorrect clock pin location for the PCIe core N/A N/A
AR# 34609
Date Created 04/30/2010
Last Updated 12/15/2012
Status Active
Type General Article
Tools
  • EDK - 12.1