11.5 EDK, XPS_LL_TEMAC - "ERROR:PhysDesignRules - Invalid configuration..."

Description

The following error occurs when I use an xps_ll_temac in EDK 11.5:

"ERROR:PhysDesignRules - Invalid configuration (incorrect pin connections and/or modes) on block:< Hard_Ethernet_MAC/Hard_Ethernet_MAC/I_RX0/
NO_INCLUDE_RX_VLAN.I_RX_LL_IF/YES_V6_OR_S6.ELASTIC_FIFO/
BU3/U0/grf.rf/mem/gdm.dm/Mram_RAM6_RAMD >:< LUT_OR_MEM5 >. 
With dual or single port RAM programming the DI1 and WA1-WA5 pins must be connected.

ERROR:PhysDesignRules - Invalid configuration (incorrect pin connections and/or modes) on block:< Hard_Ethernet_MAC/Hard_Ethernet_MAC/I_RX0/
NO_INCLUDE_RX_VLAN.I_RX_LL_IF/YES_V6_OR_S6.ELASTIC_FIFO/
BU3/U0/grf.rf/mem/gdm.dm/Mram_RAM6_RAMD_D1>:< LUT_OR_MEM6 >. 
For RAMMODE programming set with DPRAM32 or SPRAM32 or SRL16 the DI2 input pin must be connected."

How do I resolve this error?

Solution

A software patch for this issue is available from (Xilinx Answer 34693).

Alternatively, this issue can be fixed by adding the following lines to the UCF file (typically "system.ucf"):
 #Xilinx Answer 34678 - 11.5 EDK, XPS_LL_TEMAC - ERROR:PhysDesignRules - Invalid configuration 
 # remove for EDK 12.1 and later.
 NET "*/I_RX0/NO_INCLUDE_RX_VLAN.I_RX_LL_IF/YES_V6_OR_S6.ELASTIC_FIFO/BU3/dbiterr" S;

This issue is fixed in ISE Design Suite 12.1 and later. The patch and/or constraint are no longer necessary in 12.1 and should be removed.